1.2 Computer-System Organization

Question 1

A modern general-purpose computer system consists of one or more _____ and a number of device controllers.

Answer 1

CPUs

Question 2

Device controllers are connected through a common _____ that provides access between components and shared memory.

Answer 2

bus

Question 3

Each device controller is in charge of a specific type of _____, such as a disk drive or graphics display.

Answer 3

device

Question 4

A device controller maintains some local _____ storage.

Answer 4

buffer

Question 5

The device controller is responsible for moving the data between the peripheral devices and its local _____ storage.

Answer 5

buffer

Question 6

Typically, operating systems have a _____ for each device controller.

Answer 6

device driver

Question 7

The device driver provides the rest of the operating system with a uniform _____ to the device.

Answer 7

interface

Question 8

The CPU and device controllers can execute in _____, competing for memory cycles.

Answer 8

parallel

Question 9

To ensure orderly access to shared memory, a memory controller _____ access to the memory.

Answer 9

synchronizes

Question 10

The three key aspects of the system discussed are interrupts, storage structure, and _____ structure.

Answer 10

I/O

Question 11

To start an I/O operation, the device driver loads the appropriate registers in the _______.

Answer 11

device controller

Question 12

The device controller examines the contents of the registers to determine what action to take, such as _______.

Answer 12

read a character from the keyboard

Question 13

Once the transfer of data is complete, the device controller informs the device driver that it has _______.

Answer 13

finished its operation

Question 14

The device driver gives control to other parts of the operating system, possibly returning the data or a _______ to the data if the operation was a read.

Answer 14

pointer

Question 15

For other operations, the device driver returns status information such as ‘write completed successfully’ or _______.

Answer 15

‘device busy’

Question 16

The controller informs the device driver that it has finished its operation via an _______.

Answer 16

interrupt

Question 17

Hardware may trigger an interrupt by sending a signal to the CPU, usually by way of the _______.

Answer 17

system bus

Question 18

When the CPU is interrupted, it stops what it is doing and immediately transfers execution to a _______ location.

Answer 18

fixed

Question 19

The interrupt service routine executes, and on completion, the CPU resumes the _______ computation.

Answer 19

interrupted

Question 20

Each computer design has its own interrupt mechanism, but several functions are _______.

Answer 20

common

Question 21

The straightforward method for managing the transfer of control to the interrupt service routine would be to invoke a _______ routine.

Answer 21

generic

Question 22

Interrupts must be handled quickly, as they occur very _______.

Answer 22

frequently

Question 23

A table of pointers to interrupt routines can be used to provide the necessary _______.

Answer 23

speed

Question 24

The table of pointers is generally stored in _______ memory.

Answer 24

low

Question 25

These locations hold the addresses of the _______ service routines for the various devices.

Answer 25

interrupt

Question 26

This array, or interrupt vector, of addresses is indexed by a unique number given with the _______ request.

Answer 26

interrupt

Question 27

The interrupt architecture must also save the _______ information of whatever was interrupted.

Answer 27

state

Question 28

If the interrupt routine modifies the processor state, it must explicitly save the _______ state.

Answer 28

current

Question 29

After servicing the interrupt, the saved return address is loaded into the _______ counter.

Answer 29

program

Question 30

The CPU detects a signal on the interrupt-request line after executing every ___.

Answer 30

instruction

Question 31

The CPU reads the ___ when it detects that a controller has asserted a signal.

Answer 31

interrupt number

Question 32

The CPU jumps to the interrupt-handler routine using the interrupt number as an index into the ___.

Answer 32

interrupt vector

Question 33

The interrupt handler saves any state it will be changing during its ___.

Answer 33

operation

Question 34

After processing, the interrupt handler executes a ___ to return the CPU to the execution state prior to the interrupt.

Answer 34

return from interrupt instruction

Question 35

The device controller raises an interrupt by asserting a signal on the ___.

Answer 35

interrupt request line

Question 36

In a modern operating system, we need the ability to defer interrupt handling during ___.

Answer 36

critical processing

Question 37

An efficient way to dispatch to the proper interrupt handler for a device is a requirement of modern operating systems, known as ___.

Answer 37

efficient dispatching

Question 38

Modern computer hardware provides multilevel interrupts, allowing the operating system to distinguish between ___ and ___ interrupts.

Answer 38

high-priority, low-priority

Question 39

The nonmaskable interrupt is reserved for events such as ___.

Answer 39

unrecoverable memory errors

Question 40

The second interrupt line is ___, which can be turned off by the CPU before executing critical instructions.

Answer 40

maskable

Question 41

The purpose of a vectored interrupt mechanism is to reduce the need for a single interrupt handler to search all possible ___ of interrupts.

Answer 41

sources

Question 42

A common solution to the interrupt handler address limitation is to use ___.

Answer 42

interrupt chaining

Question 43

In interrupt chaining, each element in the interrupt vector points to the head of a list of ___.

Answer 43

interrupt handlers

Question 44

Events from 0 to 31 are used to signal various error conditions and are classified as ___.

Answer 44

nonmaskable

Question 45

Events from 32 to 255 are classified as ___ and are used for device-generated interrupts.

Answer 45

maskable

Question 46

The interrupt mechanism implements a system of interrupt ___ levels.

Answer 46

priority

Question 47

The system of interrupt priorities allows a high-priority interrupt to ___ the execution of a low-priority interrupt.

Answer 47

preempt

Question 48

Interrupts are used throughout modern operating systems to handle ___ events.

Answer 48

asynchronous

Question 49

Because interrupts are used heavily for time-sensitive processing, efficient interrupt handling is required for good system ___.

Answer 49

performance

Question 50

The CPU can load instructions only from _______.

Answer 50

memory

Question 51

Main memory is also called _______.

Answer 51

random-access memory (RAM)

Question 52

Main memory is commonly implemented in a semiconductor technology called _______.

Answer 52

dynamic random-access memory (DRAM)

Question 53

The first program to run on computer power-on is called a _______.

Answer 53

bootstrap program

Question 54

Since RAM is ________, it cannot be trusted to hold the bootstrap program.

Answer 54

volatile

Question 55

For nonvolatile storage, computers use _______.

Answer 55

electrically erasable programmable read-only memory (EEPROM)

Question 56

EEPROM can be changed but cannot be changed _______.

Answer 56

frequently

Question 57

The load instruction moves a byte or word from main memory to an _______ within the CPU.

Answer 57

internal register

Question 58

The store instruction moves the content of a register to _______.

Answer 58

main memory

Question 59

In a von Neumann architecture, the instruction-execution cycle first fetches an instruction from _______.

Answer 59

memory

Question 60

Main memory is usually too small to store all needed programs and data _______.

Answer 60

permanently

Question 61

The most common secondary storage devices are _______ and _______.

Answer 61

hard-disk drives (HDDs), nonvolatile memory (NVM) devices

Question 62

Secondary storage is _______ than main memory.

Answer 62

much slower

Question 63

Tertiary storage is used only for special purposes, such as _______.

Answer 63

to store backup copies of material

Question 64

The main differences among various storage systems lie in _______, ________, and _______.

Answer 64

speed, size, volatility

Question 65

The various storage systems can be organized in a hierarchy according to _______ and _______.

Answer 65

storage capacity, access time

Question 66

Volatile storage is referred to simply as _______.

Answer 66

memory

Question 67

Nonvolatile storage retains its contents when power is _______.

Answer 67

lost

Question 68

Mechanical storage systems include _______ and _______.

Answer 68

HDDs, optical disks

Question 69

Electrical storage systems include _______ and _______.

Answer 69

flash memory, SSD

Question 70

Mechanical storage is generally larger and less expensive per byte than _______ storage.

Answer 70

electrical

Question 71

The design of a complete storage system must balance all factors, including the use of _______ memory as necessary.

Answer 71

expensive

Question 72

Caches can be installed to improve performance where a large disparity exists between two _______.

Answer 72

components

Question 73

A large portion of operating system code is dedicated to managing _______.

Answer 73

I/O

Question 74

The form of _______ I/O is fine for moving small amounts of data.

Answer 74

interrupt-driven

Question 75

Direct memory access (DMA) is used to solve the problem of high overhead when used for _______ data movement.

Answer 75

bulk

Question 76

In DMA, the device controller transfers an entire block of data directly to or from the device and _______.

Answer 76

main memory

Question 77

Only one _______ is generated per block in DMA to indicate that the operation has completed.

Answer 77

interrupt

Question 78

While the device controller is performing DMA operations, the CPU is available to accomplish _______.

Answer 78

other work

Question 79

Some high-end systems use _______ rather than bus architecture.

Answer 79

switch

Question 80

On switch architecture systems, multiple components can talk to other components _______.

Answer 80

concurrently

Question 81

In switch architecture, DMA is even more _______.

Answer 81

effective