131 Flashcards
(199 cards)
1
Q
Define ISA
A
interface between hardware + software - set of commands a processor can understand/execute
2
Q
ALU provides… + implements…
A
registers (store operands + results), status flags (bits organised in flags register as -overflow, zero or negative)
arithmetic + logic operations
3
Q
How to add 2 bits? How to add 3 bits?
A
2 - half adder aka S = A XOR B and S = A . B
3 - full adder aka S = Cin XOR (A XOR B) Cout = A.B + Cin . (A XOR B)
4
Q
What is the problem with ripple-carry adders and how to solve this?
A
slow as each stage has to wait for carry bit from above
can solve with carry select adders (split problem by adding lower n/2 bits as usual but add upper n/2 bits using 2 full adders where one Cin is 1 and the other 0)
- effectively x2 speed + can split as long as cost/space allows
5
Q
How does an ALU identify an overflow?
A
inputs’ sign bits are the same but the result has a different sign
Cin ⊕ Cout = 1 = arithmetic overflow error
6
Q
How does the ALU perform simple multiplication + division?
A
Can be done with repetitive adders (slow)
Bit shifting (only works for powers of 2)
- shifts numbers to left(*)/right(/) by n^2 + may be arithmetic, logical, rotate or rotate through carry
7
Q
What are the types of volatile memory?
A
dynamic - used for main mem., slow but cheaper
+ static - used for registers/caches, fast but expensive
8
Q
What is main memory?
A
each location holds 1 unit of info
identified by address (usually linear 0..n) which typically maps to multiple memory chips - address decoder maps linear addresses to specific location in a specific memory chip
9
Q
What ways can machine architecture organise mutli-byte words in memory?
A
big-endian - location (byte) with the lowest memory address holds the most significant byte
little-endiain - location with the lowest memory address holds the least-significant byte
10
Q
How does static memory store bits
A
stored bits are organised into multi-bit storage slots called registers
use networks of logic components (NAND gates) to build storage for individual data bits
11
Q
What does combinatorial vs sequential logic entail?
A
c = outputs are purely a function of its inputs
s = outputs are a function of its inputs AND its current outputs
involves feedback of the outputs to the inputs which is the hook on which we hang memory
12
Q
What is a set-reset (S-R) flip-flop?
A
remembers its current state where Q0 = current + Q = next
high pulse on S -> Q=1(set)
high pulse on R -> Q=0 (reset)
(both S and R can’t be 1)
- has distinct set + reset inputs rather than a single input (could set state if 1 and reset if 0)
- no way of telling the f-f exactly when it should store input data (would like a latch signal to supervise)
13
Q
What is a clocked D-type flip-flop?
A
D = 1, L = 1 → Q = 1
Q0 = 1 but D = 0, L= 0 → Q = 1
Change D = 0 to set latch to 0
- no output enable to have closer control of when existing data leaves + new data arrives
14
Q
What is a master-slave flip-flop?
A
slave is only readable where output enable is high pulse
if master latch = high → data signal is stored in master but slave is untouched
if master latch = low → data moves to slave
can implement registers using multiple master-slave flip-flops
15
Q
What is a bus?
A
bundles of wires that connect elements of VN architecture - one wire per bit
buses need output enable as all share 1 wire + so can’t all be active at once
16
Q
What do the different buses do?
A
address bus - runs between CU and main memory to tell memory to access a specific address
- width = amount of addressable memory
data bus - runs between CU and main memory to send data
- width = number of bits that can be read/written to/from memory at once
control bus
some processors may have internal + external buses (external may be narrower to reduce external pins + therefore cost)
17
Q
Control Unit
A
“little program” running inside the processor that endlessly executes the fetch-decode cycle - controls sequences + other architectural modules using their respective control lines (e.g latch, output enable, function select, carry + shift L/R)
CU is driven by clock ticks/pulses
18
Q
How can CU fetch-ex loops be implemented?
A
as a FSM (hard-wired sequential logic - built directly in terms or NAND gates)
- high performance but expensive + hard to evolve
OR
as microcode (sequence of micro-instructions in a micro-memory)
- flexible but slightly lower performance
19
Q
What is pipelining?
A
exploit inherent parallelism inside CU to speed up fetch-ex cycle
if split cycle into n-stages → get n x speedup
speed up may be reduced by hazards that “stall” pipeline + so need “flushing”
20
Q
What are the hazards associated with pipelining?
A
- control hazards: occur when a control-transfer instruc. changes the flow of execution
- data hazards: occur when instruc. n depends on a result from previous instruc. or when two parts of the pipeline need access to the same data
- structural hazards: occur when two parts of the pipeline need access to the same piece of hardware
21
Q
I/O devices
A
- input = keyboard, mouse, track ball, touch screen, camera, environmental sensor
- output = display, printer, speaker, environmental actuator
- input + output = network interfaces (ethernet, wifi, bluetooth, etc.), disks, audio cards, MIDI devices
22
Q
The I/O system enables…
A
attachment of I/O devices to the processor so they can communicate
though challenges w/
- speed-gap: I/O devices are often mechanical so run orders of magnitude slower than the CPU
- device diversity: differences like data-access modes (read-only/write-only/read-and-write, access by individual byte/block and access randomly/sequentially), device specific operations + I/O protocols
23
Q
What is a device driver?
A
software plug-ins inside the OS that abstract over device diversity by grouping sets of similar types of devices
- register device with the OS + initialises it
- initiates data transfers to/from a device
- monitors status events from a device
- manages device/system shutdowns so OS doesn’t stop till all unwritten data is stored + device is left in a safe state
24
Q
Two-fold classification (types) of device + device driver
A
character devices - send + receive 1 byte at a time - e.g. keyboard
block devices - send + receive multi-byte block at a time - e.g. hard disk
25
Two-fold classification of processor support for I/O
isolated I/O - processor provides dedicated physical pins for the connection of I/O devices + dedicated instructions for I/O operations
e.g. Intel x86
memory-mapped I/O = I/O devices and memory share the same address
space + each device has its own reserved block where the mem. address is an I/O register
26
Pros + cons of memory-mapped vs isolated I/O classification
m-m = simple, flexible programming model
but adds complexity to devices - need to understand larger addresses to work at memory speeds
i = suited to simple devices
fixed set of special I/O instruc. doesn't help w/ device diversity
27
Define runtime code/software:
software platform that provides an environment for executing user code - serves as an abstraction layer that developers can use to write software
28
Define a microcontroller unit (MCU):
compact integrated circuit equipped w/ 1 or more CPUs + memory - similar to a system on a chip
29
Define an embedded system:
electronic product comprised of one or more microcontrollers executing software instructions stored on a memory module to perform an essential function
30
What does a micro USB do?
streams data to/from the microbit and provides power
31
What does the ARM Cortex-M4F processor deal with?
interface that handles USB connection - used for flashing code + Tx/Rx data to/from devices
32
What does the ARM Cortex-M4 32-bit processor deal with?
user + runtime code + Bluetooth stack can run from flash memory, custom radio capabilities + integrated temp sensor
33
How does the microbit communicate?
via BLE antenna - peripheral that talks to central devices only + also uses radio to communicate w/ other microbits!!
34
What does the microbit motion sensor include?
an accelerometer + magnetometer - sensor will either be LSM or FXOS
35
How does the microbit connect to external components?
clips/plugs to the edge connector - 20 pins/strips with 5 rings
36
What does the microbit regulator do?
steps down voltage
37
What is Xtal for in microbits?
electronic crystal oscillator that provides clock signal
38
What buses are there in a microbit?
SWD (serial wire debug - programs target MCU)
UART (universal asynchronous receiver transmitter - exchanges data w/ USB connected device)
I2C (inter-integrated circuit bus - lets main + secondary components communicate, external + internal vers.)
39
what does the MicroBit class do?
consists of variables + methods that operate as drivers to control commonly used microbit features
instantiate as MicroBit uBit;
then initialise with uBit.init();
40
what modes can you set uBit.display to
setDisplayMode(x):
DISPLAY_MODE_BLACK_AND_WHITE = each pixel is on/off (can control brightness but for ALL) - most efficient (processing time + battery power)
DISPLAY_MODE_BLACK_AND_WHITE_LIGHT_SENSE = same as above but display drivers also sense ambient brightness from LEDs
DISPLAY_MODE_GREYSCALE = each pixel can independently have 256 levels of brightness
41
What are MicroBitImage commands?
initialise = MicroBitImage var ("0, 255, 0, 0, 0\n...); OR const unint8_t var[] = {0, 1, 0, 0...); then MicroBitImage image (5, 5, var);
display = uBit.display.print(image);
change pix. = uBit.display.image.setPixelValue(x, y, val);
get pix. value = uBit.display.image.getPixelValue(x,y);
42
What button objects are available for microbits?
uBit.buttonA, uBit.buttonB (MicroBitButton) + uBit.buttonAB (combined input - MicroBitMultiButton)
.isPressed() returns 1 for a pressed button + 0 for not
43
What deals with asynchronous programming for microbits?
message bus can listen for events + call a function (event handler) when it occurs
uBit.messageBus.listen(component, event, function);
can use release_fiber() to stop end of execution so the bus can listen for events even after the compiler reaches the end of the program
44
What is the wildcard for microbit events?
MICROBIT_EVT_ANY
45
What does uBit.thermometer.getTemperature() do?
gets integer value representative of surface temp of application MCU (not the ambient temp!!)
46
What does the microbit log do?
enables a table-like format containing rows of readings/data
can - beginRow(); = open file + create new row
logData("column label", "value") = add data
endRow() = complete logging + close file
need to uBit.logl.setVisibility(true) to make log file visible in file explorer
47
What is firmware?
midway between hardware + software
permeant software that provides low-level control of device hardware
microbit uses DAPLink (open-source interface firmware)
48
What does DAPLink do?
- creates bridge between PC + SWD
- micro:bit presents self like a USB disk
- enables drag + drop programming w/o installing drivers
- compatible w/ Windows, MacOS + Linux (mainly Linux)
- Interface mode - hex file dropped onto USB disk is written to target MCU flash - name of USB disk = MICROBIT
- Bootloader mode - hex file dropped onto USB disk is written to interface MCU flash + updates version of DAPLink - name of USB disk = MAINTENANCE
49
What software does the microbit have?
- nRF5 Software Dev. Kit
- Component Oriented Device Abstraction Layer
- Programming Languages - Python, C/C++ and MakeCode
50
Microbit software: nRF5 Software Dev. Kit
- rich development environment for nRF52/52 series MCUs
- provides hardware abstraction
- inc. drivers, libraries, example peripherals + radio protocols
51
Microbit software: Component Oriented Device Abstraction Layer
- micro:bit runtime software
- C/C++
- abstracts hardware components as software components rep by C++ classes
- offers eventing subsystem for mapping asynchronous events to event handlers
52
Microbit software: Programming Languages
- interpreted (Python) - user code + interpreter are copied into target MCU -allow users to program micro:bit live over USB
- compiled (C/C++) - user code is compiled → ARM assembly
- editors (MakeCode) - high-level programming using blocks
53
Bugs may occur during...
compilation time due to incorrect syntax, violation of common programming conventions, issues appearing as warnings + program detected as invalid by static analysis
or run time due to logical error (works not as expected)
54
2 common (but semi-impractical) ways to debug:
divide + conquer - remove/add code till you find the bug (comment it out/back in)
printf - outputs to help follow program flow
- statements may change the behaviour of the program
- takes a lot of printf statements (timely)
- cannot examine program flow in detail
55
What does uBit.serial. do?
allows you to call printf + scanf functions (uBit.serial.printf/uBit.serial.scanf)
56
What do you need to debug a running microbit?
DAPLink
on-chip debugger (OCD) allows remote debugging
integration with VS code = powerful debugging environment
57
What do debuggers do?
- less invasive than printf
+
allows you to...
- step through program 1 instruc. at a time
- set breakpoints
- investigate machine state (memory + registers)
- investigate crashes
- may be GUI or command line
though debuggers tend to be language dependent
58
What kind of hardware support may a debugger need?
in-system programming of logic devices
hardware support for code/data breakpoints
59
What is GDB?
GNU DeBugger - open source debugger developed by the GNU project that also created gcc
designed for C
command line interface but can be used w/ IDEs
e.g. (gdb) run - runs debugger
(gdb) break 4 - adds breakpoint to line 4
(gdb) x/... - displays parts of memory
60
What does (gdb) x/40xb &s do?
asks the debugger to display 40 bytes of memory starting from the address s
problem using (gdb) x/... as need to consider if the system is using little/big endian when displaying data that takes up >1 byte
61
What allows for m:b wireless communication?
2.4GHz radio module primarily designed to run BLE but also supports standard for wireless personal networks
62
What does simpler proprietary mode mean for m:b radio communication?
allows m:b to broadcast general purpose data packets to other m:bs
for privacy all devices appear identical
63
What is the m:b radio mode bandwidth used for?
split into 256 frequency channels for users to communicate on
64
Explain what dBm is:
used to express transmission range
received signal strength = dB
received power = W
ratio of P/1milliW = how much stronger P is than 1mW
P(dBm) = 10 x log10 (P(W)/1mW)
P(W) = 1mW x 10 x P(dBm)/10
a minus dBm indicates it's less than 1mW
65
What is a datagram?
transmitted by microbits
a packet (sequence of bytes) that can be >= 32 bytes
sent by = uBit.radio.datagram.send(datagramName)
can be represented as -
- an array of bytes (uint8_t array[10])
- a sequence of chars (ManagedString s("string))
- a packet buffer - PacketBuffer b(int)
generally best to use packet buffers in latest CODAL ver.
66
What is a managed type?
automatically reserves + releases memory as needed
e.g. PacketBuffer + ManagedString
while PacketBuffers can be read/written to anytime
ManagedStrings are immutable (cannot be changed once created unless comparing/joining to other strings)
67
What does packetBufferName.getRSSI() do?
retrieves received signal strength indicator measured in dBm of the most recently received datagram
68
How do you ensure m:b devices are communicating together?
make sure they're on the same channel
uBit.radio.setGroup(int) + uBit.radio.enable() has been done
69
How does the MMU manage memory?
uses translation lookaside buffer in microprocessor to translate virtual to physical addresses
70
What uses VM addresses?
read/write operations
71
In principle, how much byte-addressable memory is there for a 64-bit microprocessor?
2^64 bytes
72
What does the OS do in relation to memory management?
dynamically allocates pages of memory (typically 4KB for x86 arch.) to processes + records it in the TLB
your code remains agnostic to coordination w/ other processes when accessing memory
73
What is the difference between RAM and direct access memory?
RAM = same access speed regardless of address
direct access memory = access speed dependent on address - accesses linearly, e.g. HDD, CD, DVD, vinyl, etc.
74
Describe memory layout:
OS Kernel - memory reserved by OS to monitor/control mapping between physical + virtual addresses
Stack - data needed by function calls (stack frames)
Heap - dynamic mem. allocation for variables
Blocking Starting Symbol (BSS) - holds global vars. initialised to 0 or uninitialised
Data - holds initialised global vars.
Text - holds binary executable instruc. of programs
75
How do you find out the memory layout of an object file?
size program.o in terminal
gives bytes of text,data + bss then overall size in decimal + hex
76
What is the stack layout?
function parameters
saved instruction pointer (IP) - points to function return address
saved base pointer (BP) - points to reference address of prev. frame
locally declared variables
also a top of stack pointer (SP) - points to lowest address of stack for current frame
77
Why is there a fixed offset from the BP regardless of no. of parameters?
parameter values are pushed in reverse order (1st parameter = last pushed)
78
What does lscpu do?
display info about CPU arch.
(outputs architecture, CPU op-mode(s), address sizes + byte order)
- imagine list CPU
79
Why is there physical and virtual address sizes?
physical = theoretical byte-addressable memory
virtual = remaining bytes after extra stuff like prefix to denote number systems (e.g. 0x = hex)
80
What does (gdb) info stack + (gdb) info frame do?
displays the call stack (while running w/ debugger at a breakpoint)
displays info about the specified frame
(rip = address of next instruc. pointer + saved rip = address frame will return to)
81
What is the difference between SRAM and DRAM?
SRAM = static - used for CPU cache
DRAM = dynamic - used as main memory
82
What allows microcontrollers to interact w/ other GPIOs? (nRF52833 SoC)
memory mapped IO reading/writing to predefined memory addresses
83
What is memory shared between? (nRF52833 SoC)
microcontroller + on-board peripherals or external devices
84
How is the nRF52833 SoC memory used when Bluetooth is disabled?
NOINIT - memory area keeps count of no. of time reset button is pressed to activate Bluetooth pairing mode
UICR = user info configuration register
storage - holds long term non-volatile data
85
How is the nRF52833 SoC memory used when Bluetooth is enabled?
MBR = master boot record
SD = soft device - holds info about BLE protocol
bootloader - holds info about over-the-air firmware updates
settings - holds similar info to storage as well as Bluetooth pairing keys + states
86
What is a build automation system?
automates the process of compiling source code (from multiple source files) in binary executable code
- helps support collaboration + allows faster compilation through large and incremental builds
e.g. make = language-independent build automation system that reads a makefile script
87
What do build script generation tools do?
generate files for build automation systems - but do NOT build executable files directly
users can set up high-level configuration + generate build scripts for specific OS
88
What do makefile scripts contain?
the project structure (files + dependencies)
+ instructions for binary file creations
89
What is a target? (makefile)
- can be a filename, variable or string
- name for the actions that follow (can execute an action by typing make targetname)
if there are multiple either runs all or just the 1st
a "phony" target is always treat as out of date so always executed
90
What is a dependency? (makefile)
- can be filenames or other targets
- list of requirements for a target
if dependency is the name of another target then control descends to the actions of the other target
91
How does a dependency and target work if concerning a filename? (makefile)
files timestamps compared - the action is only executed if the target does not exist or is older than the dependencies
given no need to recompile if compiled recently!!
92
What is an action? (makefile)
- shell commands
- actions should be indented and only 1 per line
93
What is a rule? (makefile)
- the target, dependencies + actions form a rule
- contains the actions to meet a target when the dependencies are fulfilled
94
What signifies a comment + a variable in makefile?
comment = begins with a #
var = begins with a $ and is enclosed within () or {}, used within rules
NOTE: single char variables are not enclosed
95
What are automatic variables? (makefile)
further shorten the script
denoted with the usual $ followed by a symbol
96
What does the char % do? (makefile)
matches a dependency filename w/o the file extension (pattern matching char)
97
What were the design goals of the ARM instruction set?
basic but fast instruction set for compiler to translate
lowers compiler to hardware level
98
How many bits is ARM architetcure?
32-bit which defines...
- range of values in basic arithmetic
- no. of addressable bytes (0 to 2^32 -1)
- width of a standard register
99
What is a label in assembly code?
pointer inside the program or memory of the program
100
What is a directive in assembly code?
metadata that helps the assembler understand how best to translate instructions
begins with a . + treat like a comment so it doesn't appear in machine code
101
What are registers? (ARM arch.)
most fundamental storage on the chip as can carry many types
similar to vars for high level as ALU cannot process info from main mem.
only 32 bits - can bypass their small sized by using pointers to represent larger data types like strings
ARM has 16 registers (R0-R15 + CPSR)
102
What are special registers?
reserved for operational CPU state
e.g. stack pointer, link register (stores where function is called from), program counter + current program status register
103
Which registers are used to store your program data in ARM arch.?
R0-R12
104
How is ARM more space efficient?
can merge destination + source register when the same to help simplify code writing
e.g. ADD r0, r0, r1 → ADD r0, r1
105
What does an assembler do?
translates assembly → binary (1 to 1 mapping)
platform specific output!!
106
What is a pseudo-instruction?
helps simplify code writing by represent multiple statements as one
107
What does mov do?
mov rd, rs copies contents of the source register into the destination register
108
What does add do?
adds the values in the 2 source registers + stores the value in the destination reigster
presumes operands are encoded using 2's
alternate versions of add + sub (ADCS/SUBCS + ADDS/SUBS) exist to produce flags to indicate unusual results
109
What CPSR flags are there for arithmetic results?
N bit = negative flag
Z bit = zero flag
C bit = carry flag
V bit = overflow flag
110
What are the different right shifts in assembly?
ASR = arithmetic right shift (adds 1s to keep negative numbers negative)
LSR = logical shift right (standard)
ROR = right rotation (shifted bits wrap from front to end)
111
What are the logical operators in assembly?
AND, EOR (XOR), ORR, MVN (MOV that flips bits like a NOT)
112
What is an immediate operand?
using # followed by an int to replace a source register with a constant
helps save memory
113
What does MOVT do?
copies values like MOV but into the upper 16 bits of a register as MOV usually copies to the lower 16
helps take advantage of all 32 bits
114
What kind of memory addressing does ARM use?
byte-addressable
- each byte has a unique address
115
What is two types of directive?
data-type directives - helps assembler allocate appropriate space depending on data type
e.g. .word, .byte, .ascii, etc.
data directives - tells the compiler where the data should go in memory
e.g. .bss, .data, .rodata + .text
116
What are the 3 addressing modes?
reg+ const (ldr r0, [r1, #20])
reg+reg (ldr r0, [r1, r2])
reg+reg<
117
What the different load + store variations?
LDRB (load byte)
LDRSB (load signed byte)
LDRH (load halfword)
LDRSH (load signed halfword)
STRB (store byte)
STRH (store halfword)
118
What is an offset?
an integer value used to access part of a register (think like an array index)
e.g. ldr r0, [r2, #10]
119
What is the difference between sequential execution and branching?
sequential execution = PC increments by 4 each time to go to the next instruction
branching = PC offset by a multiple of 4 to skip certain instructions
120
What are the 2 types of branching?
unconditional = branching always executes same target instruction (no condition needs to be met)
conditional = branching performs a jump when a condition is met
using BNE, BEQ, BLT, BGE (can also append conditions to instructions, e.g. ADDEQ + ADDNE)
if done CMP comparison, CPSR will store result as a flag to be used in branch instruc.
121
What is a label (branching)?
alphanumeric representation of an address
address can point to an instruc. or data
used in program-relative addressing (referencing a label to offset the PC)
122
What is a function?
stored subroutine that performs a specific task based on the param provided
simplifies programming - abstraction, modularity, reusability, readability, maintainability + testability/validation
123
How is the link register related to ARM functions?
bl = branch + change PC but store current address in link register to be restored later using mov pc, lr / bx lr
124
What are the register conventions for ARM functions?
r0-r3 = argument registers to pass parameters to
r0 = return value register
link register = return address register
125
What is stack memory for in ARM functions?
memory region used to store local state of your functions (dynamic, LIFO)
SP starts at 0x20020000 + grows down in memory (decrements by word size w/ each push)
126
Which registers are preserved/non-preserved in ARM functions?
preserved = r4-r11, SP, LR + stack above SP
non-preserved = r12, r0-r3, CPSR + stack below SP
certain registers aren't preserved to ensure scope (reduce unexpected side effects)
127
What is register spilling?
when you need more registers than given, can move contents of registers to main memory
- useful for procedure nesting as LR needs to be saved in stack before calling another procedure
128
How do defined variables work in ARM?
load via ldr r1, =varname
define via .space
varname: .type value
129
Why would you want to add assembler into C code?
- can outsmart GCC logic
- enables specific optimisations
- close control of hardware
- can embed existing code fragments
- better performance in SOME cases
130
What does the GCC inline assembler do?
compiler that inserts assembler code in code of its caller
compiles assembly to an object file
removes function call overheads + can add your own assembly using asm("code") or __asm__("code")
131
What does an extended inline assembler do?
allows embedded assembler code to interact w/ C code
e.g. can assign C variables to registers
132
What are the input/output operands for extended inline assembly?
char to tell compiler how to treat variables assigned to registers
I = immediate value
J = indexing constraints (offset)
M = constant in the range
m = any valid memory address
r = general registers R0-R15 (simplest to use)
X = any operand
133
How do we counteract limited CPU register count?
use main mem. to store data → copy data into register for processing
134
What is register allocation?
compiler assigns variables into processor register
rules -
- any 2 vars must not be assigned to the same register at any point
- can use spilling to store var values
- coalescing aims to optimise register allocation to reduce value copying
135
What does the volatile qualifier do to inline assembler?
stops GCC moving code for optimisation so that code executes sequentially to avoid processor side effects
written as volatile asm ("code")
136
What is a clobbered register?
value of register only to be modified inside “asm” so compiler doesn’t use it to store any other value
denoted as :"r0"
137
What are the inline assembler special arguments?
"cc" = instruc. modifies condition code flag (saves to PSR) - used for macros + interrupts
"memory" = instruc. accesses unknown memory addresses
138
What does each assembly instruc. convert to?
16/32 bit representation that contains instruction, registers + immediate values
139
What do high-performance CPUs (x86) do to appear faster?
use caches (small fast RAM) to make main memory (large slow RAM) look faster at low cost
whereas low-performance CPUs (ARM-Cortex) put memory-on-chip w/ CPU, RAM + flash ROM
140
What is Thumb + its benefits?
subset of instruc. re-encoded in fewer bits (mainly 16, but some 32)
reduces program memory size + bandwidth requirements
141
What is Thumb state?
indicated by PC being odd, means can compile code in ARM Thumb
only available where ARM CPU allows operating state control (M3 doesn't)
142
How do you know if a Thumb instruc. is 16 or 32 bits?
if 1st 5 bits = 11101, 11110 or 11111 then 32 bits
else then 16 bits
143
What does "=r" and "r" signify in inline asm?
=r assigns a var as the return value
r assigns a var as the input value
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Define an exception:
unexpected change in flow control that allows a CPU to notify your program to implement code that manages external events
an exception causes an
exception interrupt - looks like a special function that is called by the CPU
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What is an exception caused by?
software or hardware
synchronous exception = caused by instruc. in running program
asynchronous exception = caused by I/O device requesting the processor - aka hardware interrupt
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Explain privilege levels:
due to security issues, computers do not allow full access to resources to any code
e.g. user code operates at a low privilege level
CPU limits resources access offered to diff. processes
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How can a user get protected resources given privilege levels?
can request services from OS by invoking OS functions (system calls)
e.g. SVC in ARM + syscall in x86, however no OS for microbit
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How can you transition between privilege levels?
supervisor instruc. -
CPU reads arguments from registers + executes the specific flavour of the SVC instruc.
table specifies what actions to take next based on what the service user code wants from the OS
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What does interrupt handling do?
- stops normal fetch-ex cycle
- saves current CPU state
- runs user code to manage interrupt
- changes code execution to interrupt handling code
e.g. exception handler handles exception then returns to user code - found in a branch instruc. in an exception vector
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What is the vector table for?
stores an address to execute when exception/interrupt raised
used to determine where to jump to the exception handler
placed in low memory (close to where CPU goes to on power up)
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What is a banked register?
like an extra (shadow) register
used to preserve registers for exception handlers
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Why are banked registers used over the stack during interrupts?
stack is in memory, memory is slow
banked registers use FIQ which is a fast, low-latency interrupt handling mechanism in ARM
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Explain the steps involved in exception handling:
CPSR → SPSR
execution mode + privilege lvl set
disable interrupts (using interrupt mask bits in CPSR)
return address → banked LR
push other registers → stack
branch to exception function (vector table)
execute exception handler
LR → PC, SPSR → CPSR + pop registers off stack
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What are execution modes?
diff. modes have diff. privilege lvls + helps CPU know which registers to save to and where to return to after interrupts
e.g. user mode = PLO, other modes = PL1
specified in bottom bits of CPSR
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How do CPSR flags affect execution modes?
I bit - “IRQ flag” - disables IRQ interrupts
F bit - “FIQ flag” - disable fast IRQ (FIQ) interrupts
T bit - “Thumb flag” - disable Thumb mode
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What is a BusFault?
occurs during a memory access error in the bus interface
escalates to a HardFault on Cortex-M0
157
What is an interface?
define how diff. hardware components communicate at the electrical or signal level
needed to ensure that device is ready for next batch of data + host is ready to receive next batch of data from peripheral device
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What is a protocol
exact form + meaning of the signals exchanged between the sender + the receiver
signals split into command signals + data signals
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What is a handshake?
a protocol where the receiver sends an acknowledgement for the commands + data or indicates it's ready to receive
160
What does the temperature sensor (IO) do + how?
measures die temperature over the temp. range of the device
MMIO registers -
TEMP is started by triggering the START register + stopped by triggering the STOP register
DATARDY event is generated when temp reading is reading + is available via the TEMP register
INTENSET = enable interrupt
INTENCLR = disable interrupt
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How do the Micro:bit LEDs work?
uses 2 GPIO ports each w/ 32 I/O pins where the registers...
OUT - writes GPIO port
IN - reads GPIO port
DIRSET - direction of GPIO pins
x + y controlled separately
so to light up 1 LED must set row HIGH/enabled + column LOW to complete circuit + turn on LED
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What is polled vs interrupt-driven I/O?
polled = CPU monitors a control/status register associated w/ a port
when byte arrives in a port, sets bit in control register for CPU to poll + notice "data ready" to retrieve + process bytes
interrupt-driven = devices tell the CPU when they have data to send using interrupts where CPU can proceed w/ other tasks until a device requesting service sends it an interrupt
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How does a button A (m:b) click interrupt work?
button connected to GPIO pins of ARM CPU
GPIOTE module offers GPIO pin access using tasks + events where each GPIOTE channel can be assigned 1 pin
164
What can complicate system design?
cost, hardware limitation, energy + scalability
can simplify coding via abstraction by trading CPU cycles
165
What are the ARM assembly directives for defining constant values?
.equ = assign name to constant value (immutable)
.set = assign name to constant value (mutable)
166
What is LED multiplexing?
cannot light up multiple rows at same time so turn on LEDs line by line (human eye cannot perceive diff.)
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How do you alter m:b LED brightness?
pulse width modulation - switching voltage on + off very fast
(pins on board cannot output analogue signal - pins only full 3.3V output or 0V)
168
How do you access an array in assembly?
ldr r3, [r0, r1, lsl 2] where r1 is the index (shifted by 2 for each byte) and r0 holds the address of an array
169
Describe a pure tone:
sine waves w/ frequencies related to their perceived pitch
have single freq. (f = 1/T where T = duration), sinusodial shape + no harmonics (so pure sine wave)
used in testing + research
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What is frequency?
waves produced per second
171
How do we represent sound digitally (ADC)?
as a set of discrete values
obtained via sampling amplitude at regular intervals + representing w/ a binary value
key sampling features = sampling rate (no. of samples per second) + bit depth (no. of bits per sample)
if either is inc. so is file size + accuracy given file size (bits) = sample rate (Hz) * bit depth * no. of channels * duration (secs)
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What are the standards for sampling rate + bit depth?
sampling rate = 44.1/48kHz
bit depth = 8/16/24 bits
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What are examples of sound hardware?
PC speaker = hardware device that often can only beep at diff. frequencies (e.g. for errors) as not meant to reproduce complex sound
sound card = computer component to perform ADC + DAC
developed due to demand for more complex audio
died off in 2000s as Windows killed sound cards ability to accelerate sound + be interfaced by games in an easy way
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What is sound software concerned w/?
generating sample + keeping audio subsystem of the OS/hardware fed w/ sound data
generates sample by...
- using loops to iterate through values in a sample
- store values in an array/list (depending on if you know size)
175
How can you examine a sound sample to check it's good?
by playing same data or by saving sample values to file + using GNUplot to check waveform
176
How do you feed audio subsystem w/ data?
short audio - generate entire sample + send it to the sound system in 1 go + let play
longer audio (like music) - streaming audio data into sound system + fill a buffer to let audio subsystem “drain” it to refill before its empty - usually use ring buffer (circular queue)
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What is the OS?
manages all hardware + software on a computer - acts as bridge between user + computer’s physical components
coordinates resources + provides UI
main tasks = file management, mem. management, process management, I/O handling, security/access control and multitasking + scheduling
178
What is the kernel?
software that acts as an interface between hardware + OS - core of OS
- loaded into mem. by bootloader + stays till system shuts down
- has unlimited hardware access
- intervenes to repair errors occurred in user mode
- can run in user mode (restricted for security when doing application level stuff) or kernel mode (unrestricted, needed for kernel to control hardware)
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What are the types of kernel design?
monolithic kernel - single program that contains all kernel functions
used in most modern OS
micro-kernel - splits areas of functionality up into diff. programs, running a minimal kernel as much as possible running in user-space instead
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What are programs? What are processes? What are threads?
program = static set of instruc. in memory
process = actively running (dynamic) program on machine that OS manages its code, mem., resources, security permissions + hardware context
processes may be new (being created), ready (waiting for CPU assignment), running (executing), blocked (waiting for event) or terminated - scheduling algorithms transition processes between states
thread = run inside processes where processes have 1<= + each thread shares the same resources as the parent process
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Why are thread used?
use fewer system resources than full processes
threads within same process share mem. + global var.
can execute in parallel
lower overhead than processes given shared mem. + resources
OVERALL faster execution + better efficiency so widely used in web servers + OS
182
What is a protection ring?
security architecture used to regulate access to system resources, improve fault tolerance + prevent unauthorised actions
ring 0 = kernel mode
ring 1 = systems services + privileged drivers
ring 2 = additional security + managing I/O operations
ring 3 = user mode
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What are system calls?
controlled entry point into the kernel that allows user mode applications to request privileged (OS) operations
essential for communication between user programs + OS
- secure + convenient (simplifies complex hardware interaction)
- provides standardised way to use hardware resources as hardware is very sensitive
1. tell kernel process wants system call
2. switch from user-space → kernel-space
3. verify security permissions
longer calls = start system call but if taking too long mark unrunnable, only mark runnable if call completed
4. perform system call
5. switch back to user-space
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How can kernel mode be entered?
interrupts/exceptions cause hardware to transfer control to respective handler which is a fixed entry point in the kernel
185
What is message-passing in micro-kernels + per-process virtualised devices?
primary method for communication between processes + user-space applications + kernel services
micro-kernels depend on sending + receiving messages to interact w/ system components
each process perceives + interacts w/ its own virtual instance of a device rather than accessing physical hardware directly
- commonly used in OS to improve security, isolation + resource management
186
What is memory protection?
security mechanism preventing processes from accessing unauthorised memory regions
supported via memory management unit (MMU) - labels parts of memory inaccessible to processes + maps physical to virtual addresses
187
What is virtual memory?
memory management technique that is implemented using both hardware (MMU) and software (OS)
allows OS to use combo of physical RAM + disk storage to provide larger, virtual address space for programs (helps when run out of RAM)
complex - adds overhead to OS + requires hardware support
cane slow down performance
188
What does the MMU use for address translation?
uses translation look aside buffer page table to store physical/virtual addresses for translation - specialised cache within MMU that stores recent translated addresses to enable faster memory access
must be cleared/flushed so outdated mappings are not used when another process runs (due to page swapping)
TLB hit = virtual address in TLB so fast access
TLB miss = not in TLB so need to check page table in RAM (slow)
if not in page table either causes CPU exception
189
What is page swapping?
memory management technique where OS moves entire blocks of memory (pages) between RAM and HD
- allows system to free up RAM for active processes while still keeping inactive pages available for retrieval
+ more processes can run simultaneously + reduces crashes
- swapping is slow
if page has been swapped won't be in TLB or RAM so OS detects this and updates page table + adds mapping to the TLB
190
What is process scheduling?
the way processes are assigned priorities in a priority queue - process of deciding which processes to run on the CPU + for how long
key to multitasking + ensuring fair allocation
good algorithm would optimise CPU utilisation, throughput (no. of processes that complete their execution per time unit), turnaround time (time to execute), waiting time (time in queue), response time (time to response) + fairness
191
What is virtualisation?
running multiple VMs on a single physical machine - each VM behaves like a separate computer w/ its own OS + applications
can be used for desktops, servers, networks, applications + storage
hypervisor - used to create + manage/monitor VMs
allows elements of the system to be distributed among multiple virtual computers
each guest OS appears to have the host’s processor, memory + other resources all to itself (VM = isolated runtime environment)
192
What are the types of hypervisor?
type 1 (bare metal) - runs directly on hardware
- manages hardware + hosts multiple VMs w/o needing host OS
- e.g. Microsoft Hyper-V
- faster + more efficient as no host OS in middle
- commonly used w/ servers + large data centres
type 2 (hosted) - runs on top of a host OS
- uses host OS to access hardware + manage VMs like apps
- e.g. VirtualBox
- easier to set up for personal computers
- but slower as goes through host OS + if host OS crashes so will guest OSs
193
What is cloud computing?
services/infrastructure (computing resources) obtained via the internet
- public cloud - deliver 3rd party resources over internet
- private cloud - built, run + used by a single org.
- provides greater control, customisation
+ data security but expensive
- hybrid cloud - environment that mix at least one private computing environment + public cloud
- can choose which is most optimal for
the workloads
194
What is graphics?
deals w/ generating, manipulating + displaying visual content using computers
e.g. image creation, rendering, animation, modelling of 2D/3D content
used in games, simulations, engineering, medical imaging, etc.
types = 2D, 3D, vectors (use mathematical equations to define shapes - scalable but simple) + raster (uses grid of pixels - !scalable but detailed)
3D may be converted to 2D using projection - using a camera perspective to capture the 3D object as 2D
195
What is graphics hardware?
graphics cards - video card/GPU - responsible for rendering + displaying images/videos/animations on your monitor
- offloads graphics from CPU to improve performance
- makes use of direct memory access (data transfer from RAM w/o needing CPU) to be more efficient
monitor = output - may be CRD (refreshes w/ beam of electrons) or LCD (image updates at once)
display resolution - no. of pixels displayed on the screen horizontally + vertically (w x h)
connections = VGA (only not digital one), DVI, HDMI, DisplayPort or USB-C
196
What is special about GPUs?
have more transistors + a larger density of computing cores w/ more ALUs than a normal CPU
main components = thousands of small cores (parallel processing), shaders + memory blocks (video RAM)
may be dedicated (separate hardware (card) installed in desktops), integrated (built-in) or cloud
useful for AI, data science + scientific computing as well as graphics
started idea of general purpose GPU
197
What is a shader?
programs ran on graphics card to control how graphics are rendered on the screen
- pixel/fragment shaders - run for every pixel on the screen
- vertex shader - run for every vertex being rendered to transform 3D co-ord. into 2D screen co-ord.
- geometry shader - run for every primitive (e.g. triangle)
allow developers to…
- simulate lighting + shadows
- create effects + apply textures (images) to 3D models
- animate objects in real-time
198
What is WebAssembly?
low-level-binary format that runs in web browsers at near-native speed (allows code in any language to run in the browser like JavaScript)
used to bring large C/C++ codebases (e.g. for games, desktop apps, physics engines, etc.) to the web platform
diff to machine code - not machine specific as for browser, has types + has structured instruc. like loop + if
+ code reuse, better performance (than JS in heavy tasks) + portability (runs on any browser that supports it)
199
How to use WASM?
used by writing C/C++/Rust code + compiling into WebAssembly module using Emscripten SDK or Rust’s wasm-pack to binary format (.wasm)/text format (.wat)
then load that into web application + call it from JavaScript
separate from the web page but most powerful when interfaced w/ one - have to load in external modules that allow you to interface w/ a webpage
where JavaScript loads initialises + calls functions from the WebAssembly module
