Chapter 1 Flashcards
1
Q
In ……………………, If the active server fails, the hot-standby node becomes the active server
A
Asymmetric clustering
2
Q
Composed of two or more individual systems (or nodes)
A
Clustered system
3
Q
The ……….. synchronizes access to the shared memory
A
memory controller
4
Q
The CPU and the device controllers can execute in parallel
(T/F)
A
True
5
Q
………… systems are multiprocessor systems
A
Multicore
6
Q
One chip with multiple cores uses less power than multiple single-core chips
(T/F)
A
True
7
Q
EEPROM can be changed but not frequently
(T/F)
A
True
8
Q
……….. loads the registers within the device controller
A
Device driver
9
Q
A simple program stored in ROM or EEPROM
A
Bootstrap Program
10
Q
Each interrupt has a corresponding service routine (or handler)
(T/F)
A
True
11
Q
On-chip communication is slower than between-chip communication
(T/F)
A
False
12
Q
Only the operating system can execute in ……….. mode
A
kernel
13
Q
Locate the kernel, load it into memory, and start its execution
A
Bootstrap Program
14
Q
Each computer architecture has a predefined set of interrupts
(T/F)
A
True
15
Q
CPU can be viewed as …………… It acts as the manager of resources and decides how to allocate them to specific programs and users
A
resource allocator
16
Q
First appeared in servers but recently appeared on mobile devices such as smartphones and tablet computers
A
Multiprocessor Systems
17
Q
In asymmetric clustering, One node is in …………. monitoring the active server
A
hot-standby mode
18
Q
Third step in instruction execution cycle:
…………… the instruction, which may store the result back in memory
A
Execute
19
Q
The use of ………….. microprocessors is common and does not turn a single-processor system into a multiprocessor
A
special-purpose
20
Q
………. can be installed to improve access time or transfer rate
A
Caches
21
Q
The CPU interacts with …… using load or store instructions
A
RAM
22
Q
Main memory can store all programs and data permanently
(T/F)
A
False
23
Q
It is also known by the general term firmware
A
Bootstrap Program
24
Q
…………. refers to the use of high-speed memory to hold a copy of recently-accessed data assuming that it will be needed again soon
A
Caching
25
A general-purpose computer system consists of CPUs and multiple device controllers connected through a ............
common bus
26
.............. is a volatile storage device that loses its contents when power is off
RAM
27
A ............ has a local buffer storage and a set of registers
device controller
28
In symmetric clustering, An application can run concurrently on all cluster nodes using ...............
parallelization
29
In ................., Two or more general-purpose processors in close communication,
sharing bus, clock, memory, and peripheral devices
Multiprocessor Systems
30
......... mode provide more privileges than user but fewer than kernel
VMM
31
The interrupt vector is stored in low memory and holds the addresses of the interrupt service routines (or ..............)
interrupt handlers
32
CPU can be viewed as ............... It controls the I/O devices and manages the execution of user programs to prevent errors and improper use of the computer
control program
33
In ..............., Worker processors look to the boss for instruction or have predefined tasks.
Asymmetric multiprocessing
34
Increased throughput is an advantage of ................
Multiprocessor systems
35
.............. requires a mechanism to allow the failure to be detected, diagnosed, and, if possible, corrected
Fault tolerance
36
RAM is usually too small to store all needed programs and data
(T/F)
True
37
A .................. processor supports a limited instruction set
special-purpose
38
instructions to modify the content of the timer are ..........
privileged
39
In ................, No boss-worker relationship
Symmetric multiprocessing
40
In ........................, All processors are peers, where each processor can perform any task
Symmetric multiprocessing
41
The load instruction moves a word from .......... to ..........
RAM, a CPU register
42
All instructions that may cause harm are deigned as .............
privileged
43
Supports high-availability service, where a node failure does not stop service
Asymmetric clustering
44
A ........... is generally implemented by a fixed-rate clock and a counter
timer
45
In .............., The boss processor schedules and allocates work to the worker processors.
Asymmetric multiprocessing
46
.................. can continue operation despite of failures
Fault tolerant systems
47
In ..........., Device controller transfers an entire block of data directly between its local buffer and main memory, with no intervention by the CPU
device memory access
48
Also known as loosely-coupled systems
Clustered system
49
an advantage of multiprocessor systems is .......... means failure of one processor will not halt the system, but only slows it down
Increased reliability
50
Define the ways in which resources are used to solve user problems
Application programs
51
In ..............., Each node may be a single processor system or a multicore system
Clustered system
52
The CPU can load instructions only from the main memory
(T/F)
True
53
Clustered computers share storage and are closely linked via a .............
LAN
54
A software-generated interrupt (or trap) occurs by executing a ..........
system call
55
.............. processor can execute user processors
general-purpose
56
Each device controller controls a specific type of devices
(T/F)
True
57
In direct access memory, ............... generates only one interrupt per block, to inform the device driver, rather than one interrupt per byte
Device controller
58
.................... multiprocessing used by most systems
Symmetric
59
A software-generated interrupt (or ..........) occurs by executing a system call
trap
60
........... are not associated with the operating system
Application Programs
61
Supports high performance computing better than multiprocessor systems
Symmetric clustering
62
........... ensures that an update to some data in a cache is
reflected immediately in other caches containing a copy of that data
Cache coherency
63
........... processors include device-specific processors, such as disk, keyboard, and graphics controllers
Special-purpose
64
A ............ interrupt (or trap) occurs by executing a system call
software-generated
65
In I/O operation, .............. determines action to take based on registers
Device controller
66
............ are associated with the operating system
System programs
67
The interrupt vector is stored in low memory and holds the addresses of the .............. (or interrupt handlers)
interrupt service routines
68
............. divides a program into separate components to run in parallel
Parallelization
69
................. = kernel + system programs
Operating system
70
A ............. interrupt occurs by sending a signal to the CPU
hardware-generated
71
The main requirement for ............. is to be able to hold large quantities of data permanently (e.g. hard disk drive)
secondary storage
72
In I/O operation, ............ transfers data between device and its local buffer
Device controller
73
The interrupt handler must be executed when the interrupt occurs
(T/F)
True
74
A single processor system has only one .......... processor
general-purpose
75
................ is the ability to continue providing service proportional to the level of surviving hardware
Graceful degradation
76
most computer systems provide .......... as an extension of main memory
secondary storage
77
This scheme defines a boss-worker relationship
Asymmetric multiprocessing
78
A ......... can be set to interrupt the system after a specified period
timer
79
............. processor cannot execute user processor
special-purpose
80
More efficient than multiple chips with single cores
Multicore Systems
81
Second step in instruction execution cycle:
............ the instruction, which may require fetching operands from
memory and store them in some CPU internal registers.
Decode
82
Increased reliability is crucial in many applications
(T/F)
True
83
Bootstrap Program is also known by the general term ..........
firmware
84
User defined code must execute in .......... mode
user
85
In I/O operation, .............. generates an interrupt to inform the device driver
Device controller
86
More processors means less work in more time
(T/F)
False
87
A .............. processor supports a complete instruction set
general-purpose
88
The ........... is stored in low memory and holds the addresses of the interrupt service routines (or interrupt handlers)
interrupt vector
89
Multiple computing cores on a single chip
Multicore Systems
90
....... needs privileges so it can create and manage virtual machines
VMM
91
The .............. is responsible for moving the data between the peripheral devices that it controls and its local buffer storage
device controller
92
The operating system provides a .......... that understands the device controller and provides a uniform interface to the device
device driver
93
All multiprocessor systems are multicore systems
(T/F)
False
94
The store instruction moves the content of a ............ to ..........
CPU register, RAM
95
Provides basic computing resources
Hardware
96
Sometimes, different modes are used by various kernel cT/F)
True
97
An ........... is a signal that is generated when some event occurs
interrupt
98
A ............ indicates the current mode: kernel (0) or user (1)
mode bit
99
In .................., While the device controller is transferring a whole data block, the CPU is available to accomplish other work
direct access memory
100
In ..................., Two or more nodes are running applications and are monitoring each other
Symmetric clustering
101
Protects the operating system from errant users
Dual-Mode Operation
102
ROM can be changed
(T/F)
False
103
Controls the hardware and coordinates its use among the application programs
Operating system (OS)
104
............. can execute only in kernel mode
Privileged instructions
105
The ......... is the one program running at all times
Kernel
106
Initialize all aspects of the system (e.g. CPU, memory).
Bootstrap Program
107
Also known as parallel systems or tightly-coupled systems
Multiprocessor Systems
108
an advantage of multiprocessor systems is .......... means sharing peripherals, mass storage, and power supplies means less cost
Economy of scale
109
First step in instruction execution cycle:
.......... the instruction from memory and store it in the CPU’s instruction register
Fetch
110
The main memory (or RAM) is implemented as ..........
DRAM
