PERIODIC INTERRUPTS, WAVEFORM GENERATION, TIME MEASUREMENT

Question 1

A signal to the processor emitted by hardware or software indicating an event that needs immediate attention.

Answer 1

INTERRUPTS

Question 2

INTERRUPTS
* ______ programming concept
* E_I_
* I

Answer 2

1. Low level
2. Extremely important
3. Irreplaceable

Question 3

ORIGIN OF INTERRUPTS
* Normal view of a computer program: sequence of instructions executed _____ , jumps are allowed

Answer 3

serially

Question 4

ORIGIN OF INTERRUPTS
* This view ______ for the real world.

Answer 4

isn’t good enough

Question 5

ORIGIN OF INTERRUPTS
* Programs for embedded systems usually service
_______

Answer 5

real-life demands

Question 6

ORIGIN OF INTERRUPTS
* Real-life demands _____ for anything.

Answer 6

don’t wait

Question 7

ORIGIN OF INTERRUPTS
* Consider a typical embedded system program: it usually consists of an infinite loop, called the _________

Answer 7

“program loop”

Question 8

ORIGIN OF INTERRUPTS
* In each iteration, the program checks whether
_________ (i), gives _______ (ii) and
performs ___________ (iii).

Answer 8

i. events have occurred
ii. suitable responses
iii. periodic tasks

Question 9

ORIGIN OF INTERRUPTS
* This model is sufficient if processor is __________ with respect to real world

Answer 9

extremely fast

Question 10

Why Interrupts?
* We need a method to ______ the moment they occur, and not after some delayed time.

Answer 10

handle events

Question 11

Why Interrupts?
* ______ are special events that can “interrupt” the normal flow of a program.

Answer 11

Interrupts

Question 12

Why Interrupts?
* The ______ stops the normal program, handles the interrupt, and then resumes its normal work.

Answer 12

processor

Question 13

An electronic alerting signal sent from the processor from an external device, like a disk controller or an external peripheral

Answer 13

Hardware Interrupts

Question 14

Caused either by an exceptional condition or a special instruction in the instruction set which causes an interrupt when it is executed by the processor.

Answer 14

Software Interrupts

Question 15

• The state of continuous monitoring
• The microcontroller keeps checking the status of other devices

Answer 15

Polling

Question 16

For every interrupt, there must be an ________,
or interrupt handler. When an interrupt occurs, the microcontroller runs the __________

Answer 16

interrupt service routine (ISR)

Question 17

The table of memory locations set aside to hold the addresses of ISRs is called as the ______

Answer 17

Interrupt Vector Table

Question 18

Two types of Interrupt modules

Answer 18

• LEVEL TRIGGERED
• EDGE TRIGGERED

Question 19

Enabling and Disabling an Interrupt
* Upon _____, all the interrupts are disabled even if they are activated. The interrupts must be enabled using software in order for the microcontroller to respond to those interrupts.

Answer 19

Reset

Question 20

Enabling and Disabling an Interrupt
* ______ is responsible for enabling and disabling the interrupt.
* _______ is a bitaddressable register.

Answer 20

IE (interrupt enable) register

Question 21

Types of Interrupt Enable Register

Answer 21

• EA
• -
• ET2
• ES
• ET1
• EX1
• ET0
• EX0

Question 22

Interrupt Enable Register
* Global enable/disable

Answer 22

EA

Question 23

Interrupt Enable Register
* Undefined

Answer 23

-

Question 24

Interrupt Enable Register
* Enable Timer 2 interrupt

Answer 24

ET2

Question 25

Interrupt Enable Register * Enable Serial port interrupt.

Answer 25

ES

Question 26

Interrupt Enable Register * Enable Timer 1 interrupt.

Answer 26

ET1

Question 27

Interrupt Enable Register * Enable External 1 interrupt

Answer 27

EX1

Question 28

Interrupt Enable Register *Enable Timer 0 interrupt.

Answer 28

ET0

Question 29

Interrupt Enable Register * Enable External 0 interrupt.

Answer 29

EX0

Question 30

What happens if the 8051 is executing an ISR that belongs to an interrupt and another one gets active?

Answer 30

In such cases, a high-priority interrupt can interrupt a low-priority interrupt. This is known as **interrupt inside interrupt**. In 8051, a low-priority interrupt can be interrupted by a high-priority interrupt, but not by any another low-priority interrupt

Question 31

______ is a register. Recall that registers are special, fixed-size variables with hardware implications

Answer 31

Timer

Question 32

The timer, when started, begins at __ (i) . After every time t, its value increases by ___ (ii).

Answer 32

i. 0 ii. 1

Question 33

When the timer reaches its maximum value, in the next cycle, its value becomes __ again and the process repeats itself

Answer 33

0

Question 34

TIMERS CAN GENERATE CERTAIN INTERRUPTS:

Answer 34

Two

Question 35

is generated when a timer tries to exceed its maximum value and resets to 0.

Answer 35

OVERFLOW

Question 36

There is a register called as _________, whose value we can set

Answer 36

OCR (Output Compare Register)

Question 37

A timer works in three modes:

Answer 37

Normal, CTC and PWM.

Question 38

Timer starts at 0, goes to maximum value and then resets itself.

Answer 38

Standard mode

Question 39

Timer starts at 0 as usual, but instead of resetting after maximum value, it resets after reaching value specified in OCR register

Answer 39

CTC (Clear Timer on Compare) Mode

Question 40

* Simple method of obtaining analog output of any value between 0 and 5V. * This “analog” value is obtained using timers.

Answer 40

PWM (Phase Width Modulation) Mode