Revision Deck

Question 1

Cache Coherence (Definition, Two Types)

Answer 1

Ensures that all processors in a multi-core (or multi-processor) system see a consistent and up-to-date view of shared data in the memory location.

Types:
- Snooping Protocols: A type of cache coherence protocol in which each cache on the bus monitors (snoops) all bus transactions to maintain data consistency among caches.
* Write-Invalidate: Writing to a cache line invalidates all other cached copies through bus snooping.
* Write-Update: When writing to a cache line, all the shared copies of the other caches are updated through bus snooping.

• Directory Protocols: A type of cache coherence protocol in which directories are used to manage caches, sharing the status of each cache line in one location (directory).

Question 2

MESI (Defintion, Acronym)

Answer 2

MESI is a type of snooping protocol.

Acronym (four possible states a cache line can be in):
- Modified (M): cache line is the only valid copy, and has been changed.

• Exclusive (E): cache line is the only valid copy, and has not been changed.
• Shared (S): cache line is one of many valid copies, and has not been changed.
• Invalid (I): cache line is not present.

Question 3

VLIW Processor (ILP)
(Defintion)

Answer 3

VLIW processors are a type of CPU architecture that allows the execution of multiple operations within a single instruction.

Question 4

Data Level Parallelism
(SIMD examples, Defintion of DLP, Scalar vs Vector, Optimisation (MVVM))

Answer 4

Examples of SIMD:
- Vector Architectures
- GPUs
- Video and Sound Processing.

Definition: A form of paralellism in which the same operation is performed simultaneously on multiple data elements.

Scalar vs Vector:
- Scalar: Working on one piece of data at a time.

• Vector: Working on the same operation on multiple data elements at the same time.

Optimisations:
- Multiple Lanes
- Vector Length Register
- Vector Mask Register
- Memory Banks

Question 5

Simulation
(Functional Simulator, User-Mode, Full-System)
(Cycle Accurate Simulator)

Answer 5

Functional Simulator: focuses on the correct execution of instructions of the ISA.

User-Mode Simulation: simulates individual programs, and emulates OS interface.

Full-System Simulation: simulates the entire platform (CPU, memory), and allows unmodiifed OS to tun in simulated environment.

Cycle Accurate Simulator: simulates the microarchitecture of a processor.

Question 6

Hardware Security (Meltdown and Spectre)

Answer 6

Meltdown:
- A security vulnerability that allows a malicaious process to read all memory, even when it is not allowed.
- Breaks down the barrier between kernel space and user space in memory (OS).
- An exploitation of out-of-order execution behaviour.

1. The data is loaded into a register (inaccessible to attacker).
2. an instruction accesses a cache line based on the secret data of the register.
3. the attacker uses flush+reload to determine the cache line and thus the secret data can be read.

Spectre:
1. Setup: Prime the branch predictor so that it will mispredict.
2. Execute: Execute the short-term instructions.
3. read the results using a sde-channel attack.

Question 7

Programming Logic (Digiital Logic)

Answer 7

AND
OR
XOR
NAND
NOR
XOR