SLR1 Flashcards
(25 cards)
What is the clock speed of a CPU
The number of fetch decode execute cycles that can be performed in a second
Why is cache used over RAM
it is inside the CPU so is faster to access
what are cores
A copy of a CPU that contains one of each of the registers inside the CPU
Why doesn’t doubling the number of cores double the performance of the CPU
All the cores need to communicate with each other.
Some programs don’t make use of all the cores
All cores share the same cache
What is the Harvard architecture
A CPU architecture where instructions and data are stored in different locations each with its own bus
Why do RISC processors use the Harvard architecture
The CPU can: access data, read instructions and fetch data at the same time
What is SIMD
Single instruction multiple data
Often used by GPUs
What is MIMD
where multiple instructions are carried out on multiple items of data
Often used by CPUs
What is distributed computing
Where multiple computers on a shared network take on a small part of a larger problem
What is the role of the Program Counter during the FETCH stage
It stores the address of the current instruction
What is done with the address stored at the PC
it is copied to the MAR
It is then sent to RAM via the address bus
What happens after the address is sent to RAM
It waits for an instruction to be sent from the CU along the control bus
What is the role of the CIR in the FDE cycle
The current instruction register stores the instruction currently being executed
What is the role of the DU in the DECODE stage
the DU decodes the instruction stored in the CIR
What is contained in the instruction stored in the CIR
Opcode - The instruction
Operand - Which piece of data to perform it on
What role does the CU have in the FDE cycle
Coordinates the CPU by directing the flow of data between the CPU and other devices
Sends read and write requests to RAM
Where are status registers and Clock found
The CU
What role does the MAR perform
Stores the address of the data to be fetched
Sends this to RAM via the address bus
what role does the MDR perform in the FDE cycle
Temporarily stores data that is read from or written to memory
what does the Program Counter store
The address of the next instruction to be executed
This address is copied to the MAR at the start of each cycle
what role does the CIR perform in the FDE cycle
Holds the current instruction being executed
Contains both the opcode and operands of an instruction
What does the ALU perform
Arithmetic and logic operations
What does the ACC store
Results from the ALU
what is the role of the address bus
sends memory addresses to RAM
