Structure and Functions Flashcards

1
Q

What is the CPU

A

Central Processing Unit

responsible for processing all the data within the computer

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2
Q

PC

A

Program Counter

Stores the address of the next instruction to be executed

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3
Q

ALU

A

Arithmetic Logic Unit

Does calculations and logic e.g. comparison

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4
Q

CU

A

Control Unit

Sends signals to coordinate how the processor works and controls how the data moves around the CPU and between the CPU and memory

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5
Q

MAR

A

Memory Address Register

Stores the address of the data or the instructions to be fetched from or sent to memory

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6
Q

ACC

A

Accumulator

Stores the result of calculations made up by the arithmetic logic unit

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7
Q

MDR

A

Memory Data Register

Stores the data that is to be sent or to be fetched from memory

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8
Q

CIR

A

Current Instruction Register

Stores the actual instruction that is being decoded and executed

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9
Q

What are the three buses in the CPU and what do they do

A

Address Bus

Data Bus

Control Bus

They are a set of parallel wires which connect two or more components inside the CPU, they are collectively called the system bus

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10
Q

What does each bus do?

A

Data Bus - It’s bi-directional so it can move data in both directions, used for transporting data and instructions between components, read/write

Address Bus - one directional, used to transmit the memory addresses specifying where data is to be sent to or retrieved from, read/write

Control Bus - bi-directional, used to transmit control signals between internal and external components, coordinates the use of the address and data buses and provides status information between system components, sends signals

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11
Q

What are registers?

A

Locations of very high speed computer memory within the processor

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12
Q

What are general-purpose registers

A

used to store the results of the intermediate calculations that are part of larger computations

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13
Q

What do dedicated or special-purpose registers do?

A

Have specific purpose within the fetch-decode-execute cycle

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14
Q

What are the registers?

A

PC, CIR, MAR, MDR, ACC and SR

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15
Q

What does the decode unit hold?

A

On the left, it has the opcode and operand which consists of 4 numbers each like “0000 0000” or a 4 number opcode and the word address as the operand like “0001 address”

On the right is the instructions like “add” and “end”

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16
Q

Fetch using the location 0000

A

The PC is loaded with the address of the first or next instruction to be executed (so location 0000)

then its copied to the MAR and then it goes along the address bus to the memory (RAM)

the CU sends a signal down the control bus to say to read

the contents of whatever is at the address 0000 is transferred along the data bus and added to the MDR and CIR

(if the address was 0000 the value in RAM would be 0101 0101)

the PC is incremented to get the next data instruction; 0001

17
Q

Decode

A

the instruction in the CIR is decoded by the decode unit

the value copied from the RAM from Fetch (0101 0101) is made up of the opcode (operation; load, add, sub, store) and operand (data or address)

if on the decode unit “0101 address” means load, you would load whatever is in address 0101

18
Q

Execute

A

As the item we need is in address 0101 we need to update the MAR to 0101

address is sent down the address bus to memory (RAM)

wait for a signal from the control unit to read the data

the data is in location 0101 ( which is 0011 0000) is sent down the data bus and added to the MDR

this is then passed to the ACC

this is then passed to the ALU which does any calculations and then back to the ACC which stores the results of any calculations done by the ALU

the calculation is executed by the ALU and the result of the instruction is stored in the accumulator, a general-purpose register, or back into main memory

19
Q

Structure of the CPU chip (with cores)

A

CPU chip - 4 cores, one cache, one clock and then one external cache which is outside the CPU chip

Each core contains an ALU, Control Unit and Registers

20
Q

the clock - how it works

A

The processor carries out one instruction at a time
to coordinate this action, the CPU has an internal quartz crystal clock that runs at a certain speed
this is called clock frequency
with each tick of the clock, a single-core CPU can process one instruction. 3.5GHz, this means that 3.5 billion instructions can be processed every second

21
Q

clock frrquency, CPU, instructions correlation

A

The higher the clock frequency, the faster the CPU can run and the more instructions that can be processed every second

22
Q

the clock - heat sinks

A

Every time the clock ticks, a bit of power is used and the power causes heat to be generated. if you go higher than a clock frequency of around 3.5 - 4.5 GHz, the heat will damage the chip itself
to keep the temperature down and to stop damage to the CPU, a large heat sink is required
A heat sink is a device designed to take heat away from the CPU, it includes metal fins to dissipate heat and a fan to drive air across the fins
The heatsink is placed right on top of the CPU

23
Q

the clock - overclocking & other cooling systems

A

It is possible to run a CPU faster than its normal design speed - this is called ‘overclocking’.
But to do so requires some serious cooling systems.
For example, keen gamers might invest in water-cooled computers
there are some even more exotic scientific computers cooled by liquid nitrogen

24
Q

Cores - how it works

A

A ‘core’ is a complete processing unit within the CPU - it has ALU, Control Unit and Registers
A CPU with two cores is called a ‘dual core’ and one with four cores is called a ‘quad-core’
each core can have its own internal cache to improve performance as well as a shared cache within the CPU
Increasing the number of cores improves performance in two ways
- Multi-tasking
- Parallel Processing

25
Q

Cores - Multi-tasking

A

The ability to carry out more than one task at the same time. With two cores, a CPU can run two tasks simultaneously.
For example, one core could be running a photo editing application whilst another is handling a word processing application

26
Q

Cores - Parallel processing

A

When a single task (program) is split into two or more parts and each part is processed at the same time.
In theory this would double performance on dual core CPU as each part is processed independently

However, you do not always get twice the performance because many programs cannot be split neatly into two independent parts

An example where parallel processing is possible is a task to update all the pixels on the screen. the colour of one pixel does not tend to depend on another pixel

27
Q

Cache - how it works

A

A cache is a small, but extremely fast type of memory, located inside the CPU chip itself

28
Q

large cache, processing, CPU access compared to RAM correlation and the limitation

A

Having a larger cache will speed up the processing because the CPU can access data and instructions faster than it can from RAM

However, cache memory is more expensive than standard RAM so it is a balance between performance and cost

29
Q

Cache - Levels

A

There are different levels of cache
- Level 1 (L1)cache is the fastest but the smallest size and resides in the CPU chip
- Level 2 (L2) is a bit slower but larger, and so it can hold more data
- Level 3 (L3) is slower still but can hold the most data

  • Level 2 and Level 3 caches can be found either inside or outside the CPU, depending on the motherboard design
  • A cache though is always faster than the main RAM
30
Q

Structure of the CPU chip (without cores)

A

Inside the CPU chip - registers, internal CPU cache
Outside the CPU chip - external cache, RAM, Hard Disk

Registers (fastest speed, lowest memory capacity)
Internal CPU cache
External Cache
RAM
Hard Disk (slowest speed, highest memory capacity)

As you go up the list speed increases but less memory capacity
As you go down the list, memory capacity increases but it is slower

31
Q

RAM

A

Random Access Memory

Main memory that is used to store computer programs and data that are currently in use

RAM will have a limit. If you want to have a larger number of applications open all at the same time there may not be enough RAM available for your computer to operate smoothly

32
Q

Pipelining

A

The Fetch execute cycle uses pipelining to be more efficient as when one instruction is being executed, another is being decoded and another is being fetched

This prevents the CPU sitting idle

it only works when subsequent instructions can be predicted, if they turn out to be wrong then they need to be thrown away; this is called flushing the pipe

if we have to flush the pipe frequently then efficiency is reduced

33
Q

Von Neumann Architecture structure & info

A

CPU, bi-directional singular system bus to RAM instructions and data

Shared memory space for instructions and data
Instructions and data are stored in the same format
A single control unit or processor follows a linear fetch, decode, execute cycle
One instruction at a time
Registers are used as fast access to instructions and data

34
Q

Harvard architecture structure & info

A

RAM instructions, bi-directional system bus, CPU, another bi-directional system bus, RAM data
Instructions and data stored in separate memory units
Each has it’s own bus
Reading and writing data can be done at the same time as fetching an instruction
Used by RISC processors

35
Q

Von Neumann VS Harvard

A

Von Neumann
+ Programmers organise the content of memory and they can use the whole capacity of the installed memory
+ One bus is simpler for the Control Unit design
+ Development of the Control Unit is cheaper and faster
+ Computer with one bus is cheaper
+ Data and instructions are accessed in the same way
- One Bus (for data, instructions and devices) is a bottleneck

Harvard
+ Two memories with two Buses allow parallel access to data and instructions. Execution can be 2x faster
- Control unit for two buses is more complicated and more expensive
- Production of a computer with two Buses is more expensive
- Development of a complicated Control Unit needs more time
- Free data memory can’t be used for instruction and vice-versa

36
Q

Alternative Processing

A

Modified Harvard - still supporting the concept of separate memory space but might share physical memory

Parallel Processors
- Single Instruction Multiple Data (SIMD) = one instruction to carry out over lots of pieces of data e.g. Used in Graphics processors to update pixels
- Multiple Instructions Multiple Data (MIMD) = Multiple instructions to carry out over lots of pieces of data e.g. complex calculations involving multiplication and addition

Distributive Processing - Each computer on the network takes on part of the problem