Unit 7 Flashcards

(21 cards)

1
Q

Speed-up achieved on a multiprocessor without increasing the size of the problem

A

strong scaling

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2
Q

Speed-up achieved on a multiprocessor while increasing the size of the problem proportionally to the increase in the number of processors

A

weak scaling

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3
Q

a uniprocessor

A

SISD or single instruction stream

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4
Q

a multiprocessor

A

MIMD or multiple instruction streams

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5
Q

The conventional MIMD programming model, where a single program runs across all processors

A

SPMD or single program multiple data streams

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6
Q

The same instruction is applied to many data streams, as in a vector processor

A

SIMD or single instruction stream

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7
Q

Parallelism achieved by performing the same operation on independent data

A

data level parallelism

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8
Q

One or more vector functional units and a portion of the vector register file

A

vector lane

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9
Q

Increasing utilization of a processor by switching to another thread when one thread is stalled

A

hardware multithreading

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10
Q

includes the program counter, the register state, and the stack

A

thread

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11
Q

includes one or more threads, the address space, and the operating system state

A

process

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12
Q

A version of hardware multithreading that implies switching between threads after every instruction.

A

fine-grain multithreading

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13
Q

A version of hardware multithreading that implies switching between threads only after significant events, such as a last-level cache miss

A

coarse-grain multithreading

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14
Q

A version of multithreading that lowers the cost of multithreading by utilizing the resources needed for multiple issue, dynamically scheduled microarchitecture

A

simultaneous multithreading (SMT)

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15
Q

A multiprocessor in which latency to any word in main memory is about the same no matter which processor requests the access

A

uniform memory access

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16
Q

A type of single address space multiprocessor in which some memory accesses are much faster than others depending on which processor asks for which word

A

nonuniform memory access

17
Q

A synchronization device that allows access to data to only one processor at a time

18
Q

Communicating between multiple processors by explicitly sending and receiving information

A

message passing

19
Q

programming technique where operations on individual elements within a data structure (like an array) are replaced with operations on the entire structure

A

vectorization or vector based code

20
Q

SIMD architecture designed by intel (Pentium)

21
Q

An API for shared memory multiprocessing in C, C++, or Fortran that runs on UNIX and Microsoft platforms. It includes compiler directives, a library, and runtime directives