4 CPU Architecture Flashcards

(28 cards)

1
Q

von neumann architecture

A

Instructions and data are stored in the same memory.

The CPU fetches both instructions and data from this shared memory.

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2
Q

what are the components of the cpu

A

ALU, CU, system clock, Immediate access store (IAS)

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3
Q

general purpose register

A

hold data that is frequently
used by the CPU e.g. accumulator

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4
Q

special purpose register

A

have a specific function within the CPU and hold the
program state.

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5
Q

current
instruction
register (CIR)

A

stores the current instruction being decoded and executed

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6
Q

Index register (IX)

A

stores a value that’s added to an address to give to another address

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7
Q

Memory addresses register (MAR)

A

stores the address of the memory location currently being read from

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8
Q

Memory data register (MDR)

A

stores data which has just been read from memory

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9
Q

Program counter (PC)

A

stores the address where the next instruction to be read can be found

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10
Q

Status Register

A

Holds flags (e.g. Zero, Carry, Overflow) to indicate results of operations.

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11
Q

Accumulator (ACC)

A

hold the results of arithmetic and logic operations

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12
Q

Roles of ALU, CU, System clock, IAS

A

Component Function
ALU Performs arithmetic and logic operations.
CU coordinate actions of others in the CPU operations, sends control signals to other CPU parts.
System Clock Controls timing, synchronizes all operations in CPU.
IAS (Immediate Access Store) Main memory used during processing for fast access.

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13
Q

address bus

A

carries addresses throughout the computer system.
Between the CPU and memory the address bus is unidirectional

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14
Q

data bus

A

data can be carried from CPU to memory as well as to and from input/output devices.
it is bidirectional

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15
Q

control bus

A

Bidirectional

Carries control signals (e.g. Read/Write).

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16
Q

Factors Affecting CPU Performance

A

Processor Type / Cores:

each core processes one instruction pe clock pulse
more cores = decrease time taken to complete task

Bus Width:

Wider buses = more data transferred at once.

Clock Speed:
each instruction is executed on a clock pulse
faster clock speed = more instructions can be run per second

Cache Memory:

stores frequently used instructions

17
Q

Ports for Peripheral Devices

A

USB (Universal Serial Bus): Connects input/output devices like keyboard, mouse.

HDMI (High-Definition Multimedia Interface): Transfers video and audio to display devices.

VGA (Video Graphics Array): Older video output interface.

18
Q

fetch decode execute

A

PC has the address of the memory location of the next instruction to be fetched
this address is copied from the PC to the MAR using the address bus
the instruction at the address contained in the MAR is copied temporarily to the MDR
the instruction if the MDR are copied into the CIR
The PC is incremented by one so it points to the next instruction which has to be fetched
the instruction is decoded and executed by sending signals via the control bus

19
Q

Interrupts

A

detected at start/end of cycle
handled:
- priority is checked
- if lower priority than current process continue with F-E cycle
- if higher priority then registers are stored on stack

20
Q

machine code

A

the programming language the CPU uses (binary)

21
Q

Assembly language

A

Human readable mnemonics

22
Q

opcode

A

operation to be carried out by the CPU

23
Q

operand

A

identifies the data to be used by the opcode

24
Q

two pass assembler

A

pass 1 :
removes comments
reads assembly language program one line at a time
check opcode is in the instruction set

pass 2 :
read assembly language program one line at a time
generate object code

25
addressing modes
Mode Description Example Immediate Value is part of the instruction. LDM #10 Direct Address is stated directly. LDD 100 Indirect Address contains the real address. LDI 200 Indexed Base + index register. LDX 100 Relative - address to be used is Offset from current location. Used in branching
26
logical shift
bits shifted out the register and replaced with 0s
27
arithmetic shift
the sign of the number is preserved (leftmost bit)
28
cyclic shift
no bits are lost, bits shifted out of one end are introduced to the other end of the register