How do we implement the Next State Logic part of an FSM?
We create a current-state | next-state table
We create Boolean expressions for each state bit using Karnaugh maps
We use these expressions to create a logic circuit
This connects to the state register
How do we implement the state register part of an FSM?
We use D flip-flops for each state bit
How can we use a ROM to implement next-state logic?
We can map each current_state codeword to the ROM address
At each address we store the relevant next_state codeword.
The next state is then found with a simple lookup of the current state
What is the third state in tristate and when do we use it?
High Impedence state
When one device is sending information over a bus, all other transmitting devices should be disconnected. This is achieved by putting output stage of devices into a high impedance state, Z, that effectively disconnects the gate from the output wire