micro arch Flashcards
1
Q
What does the ISA define
A
number of architectual registers
instruction format
addressing mode
bin rep of opcodes
2
Q
What depends on the micro architecture
A
amount sent to cache
use of pipelining or not
order memory accesses
amount of energy consumed
3
Q
What does it mean that the instructions are aligned with memory
A
they are always a multiple of its size in bytes
i.e 32 bit memory
must be divisible by 4
and in 32 bit memory if alligned last two bits always 2 so
pc needs two less bits because iti bis predefined