Microelectronics Flashcards
1
Q
How to implement Duality Principle
A
In a boolean Equation:
- ) change all 0’s to 1’s and change all 1’s to 0’s
- ) change all AND’s(⋅) to OR’s(+) and change all OR’s(+) to AND’s(⋅)
DO NOT CHANGE THE COMPEMENTED/NON-COMPLEMENTED VARIABLES (If its A, let it stay as A; if its B’, let it stay as B’)
2
Q
Founder of Boolean Algebra
A
George Bool
3
Q
(DEC) of fractional/decimal numbers into (HEX),(OCT),(BIN)
A
- ) Multiply (2 for BIN, 8 for OCT, 16 for HEX) to the Base 10 fractional number (use Base 10 multiplication)
- )the result of 1.) is A . B (A is the whole number, B is the Fractional)
- ) Append A next to the floating point (ex. 0.A)
- ) Repeat Step 1, but use B as the fractional number multiplied to 2, 8, or 16
- ) Result’s Whole number is appended next to the previous whole number
- ) Repeat until the fractional part becomes 0
4
Q
The principle that governs how machines perform subtraction
A
N’s Complement (2’s Complement for binary)
5
Q
Given a minuend and subtrahend, how is n’s complement subtraction performed?
A
Minuend + [N’s Complement of Subtrahend]
If sum overflows, discard overflowed digit, remainder is the difference (positive number)
If sum does not overflow, perform n’s complement on it, anfd append negative sign to get the difference (negative number)
6
Q
The Inventor of the Hollerith Table
A
Herman Hollerith
7
Q
Herman Hollerith made punch cards that used the Hollerith table for a company he organized called _________, that later became _________
A
Tabulating Machine Corporation (1896) becomes International Business Machines (IBM, 1924)
8
Q
The Hollerith had ___ columns, and ___ rows
A
80 columns, 12 Rows
9
Q
the 12 rows of the Hollerith table are composed of ___ Digit Rows and ___ Zone Rows
A
9 Digit Rows
3 Zone Rows
10
Q
If a Numerical character was to be encoded into the hollerith table, the column that stores this character will have ___ punch/es in the ____ Row/s
A
1 punch in the Digit Row
11
Q
If an Alphabetic character was to be encoded into the hollerith table, the column that stores this character will have ___ punch/es in the ____ Row/s
A
2 punches in Digit and Zone Row (1 each)
12
Q
If a Special Character was to be encoded into the hollerith table, the column that stores this character will have ___ punch/es
A
1 or 2 or more punches
13
Q
EBCDIC stands for ______
A
Extended Binary Coded Decimal Interchange Code
14
Q
EBCIDIC is IBM Proprietary. What does that mean?
A
Only IBM Machines have the capability of using the EBCDIC Code
15
Q
EBCDIC is in _____ Format, and is a/an ___ bit code
A
Binary Coded Decimal(BCD), 8 bit
16
Q
ASCII stands for _____
A
American Standard Code for Information Interchange
17
Q
ASCII uses __ bits to represent ___ Characters
A
7 bits to represent 128 characters
18
Q
ASCII’s 128 Characters are composed of ___ Printable Characters and ___ Non-Printable Characters
A
94 Printable, 34 non-printable
19
Q
Idempotent Law
A
X + X = X
X ⋅ X = X
20
Q
Involution Law
A
(X’)’ = X
21
Q
Complimentary Law
A
X + X’ = 1
X ⋅ X’ = 0
22
Q
Commutative Law
A
X + Y = Y + X
X ⋅ Y = Y ⋅ X
23
Q
Associative Law
A
(X + Y) + Z = X + (Y + Z)
X ⋅ Y) ⋅ Z = X ⋅ (Y ⋅ Z
24
Q
Distributive Law
A
X(Y +Z) = X⋅Y + X⋅Z
X + Y ⋅ Z = (X + Y) ⋅ (X + Z)
25
Duality Operator
(X + Y + Z + ...)ᴰ = X⋅Y⋅Z
| (X⋅Y⋅Z)ᴰ = X + Y + Z
26
Simplification Theorem:
| X⋅Y + X⋅Y' = ?
X⋅Y + X⋅Y' =
X
27
Simplification Theorem:
| A⋅(A + B + C + ... ) = ?
A⋅(A + B + C + ... ) =
A
28
Simplification Theorem:
| X + X⋅Y = ?
X + X⋅Y =
X
29
Simplification Theorem:
| (X +Y')⋅Y = ?
(X +Y')⋅Y =
X⋅Y
30
Simplification Theorem:
| (X + Y)⋅(X +Y') = ?
(X + Y)⋅(X +Y') =
X
31
Simplification Theorem:
| X⋅(X +Y) = ?
X⋅(X +Y) =
X
32
Simplification Theorem:
| X⋅Y' + Y = ?
X⋅Y' + Y =
X + Y
33
Multiplying out & Factoring:
| (X +Y) ⋅ (X' + Z) = ?
(X +Y) ⋅ (X' + Z) =
X⋅Z + X'⋅Z
34
Multiplying out & Factoring:
| X⋅Y + X'⋅Z = ?
X⋅Y + X'⋅Z =
| X + Z) ⋅ (X' + Y
35
Consensus Theorem:
| X⋅Y + Y⋅Z + X'⋅Z = ?
X⋅Y + Y⋅Z + X'⋅Z =
X⋅Y + X'⋅Z
36
Consensus Theorem:
| (X + Y) ⋅ (Y + Z) ⋅ (X' + Z) = ?
(X + Y) ⋅ (Y + Z) ⋅ (X' + Z) =
| X + Y) ⋅ (X' + Z
37
A product of 'n' Literals or Variables
Minterm
38
The Summation of minterms form a ____
Minterm Expansion
or
Sum of Products (SOP)
39
A boolean function can be expressed as the summation of its minterms or in SOP form:
F(x,y,z) = ∑m(1,2,3,...)
now, if F = 1, then _______ of the minterms are also equal to ___
at least one of the minterms are also equal to 1
40
A Summation of 'n' Literals or Variables
Maxterm
41
The Product of Maxterms form a ____
Maxterm Expansion
or
Product of Sums (POS)
42
A boolean function can be expressed as the product of its maxterms or in POS form:
F(x,y,z) = ∏M(1,2,3,...)
now, if F = 0, then _______ of the minterms are also equal to ___
at least one of the maxterms are also equal to 0
43
the Minterm or Maxterm of the first entry in a truth table always start with the subscript of ____
0
44
Minterm - Maxterm Conversions:
| Mₙ = ?
Mₙ =
mₙ'
45
Minterm - Maxterm Conversions:
| mₙ = ?
mₙ =
Mₙ'
46
given only 3 variables ( 2³ = 8, so terms involved are 0,1,2,3,4,5,6,7) Convert in terms of maxterms:
m₀ + m₁ + m₂ + m₃ = ?
m₁ + m₂ + m₃ + m₄ =
M₄M₅M₆M₇
47
given only 3 variables ( 2³ = 8, so terms involved are 0,1,2,3,4,5,6,7)
(m₀ + m₁ + m₂ + m₃)' = ?
(m₀ + m₁ + m₂ + m₃)' =
m₀'m₁'m₂'m₃'
48
given only 3 variables ( 2³ = 8, so terms involved are 0,1,2,3,4,5,6,7)
(M₄M₅M₆M₇)' = ?
(M₄M₅M₆M₇)' =
M₄' + M₅' + M₆' + M₇'
49
A product/sum of inputs that are deemed impossible to occur, or the output of that specific set of inputs is not needed will produce a minterm/maxterm considered as
a ______
Dont Care Term
50
If an output is true, it has an output of '1'
If an output is false, it has an output of '0'
If an output is useless/impossibe/not needed/dont care, it has an output of '__'
X
51
Minterm Expansion Expression with Dont Care Terms
∑m(_,_,_,...) + ∑d(_,_,_,...)
52
Maxterm Expansion Expression with Dont Care Terms
∏M(_,_,_,...) + ∏D(_,_,_,...)
53
In a K-Map, any two adjacent squares have ___ variables in common
no variables in common
54
The code used that enables the K-Map to employ the non-common variables of any adjacent square
Grey Code
55
For an n-variable K-map (ex. 4 variable k-map), how many variables does the value of one square represent/depend upon?
n variables (in the example, 4 variables)
56
For an n-variable K-map (ex. 4 variable k-map), how many variables does the value of two adjacent squares represent/depend upon?
n-1 variables (in the example, 3 variables)
57
For an n-variable K-map (ex. 4 variable k-map), how many variables does the value of 2^a adjacent squares represent/depend upon?
(n-a) variables
58
For an n-variable K-map (ex. 4 variable k-map), how many variables does the value of n adjacent squares represent/depend upon?
none (whole K-Map is grouped, Value of the function, regardless of the input, is automatically 1)
59
When grouping 1's (if minterm expansion is used), the number of squares allowed in a group must be ______
A Power of 2 (2^a, a is any integer)
60
A Group in a k-map which is not completely enveloped by a larger group, but its squares can be part of any other group
Prime Implicant
61
No matter how we group 1's or 0's in a k-map, this group will always have at least one square that uniquely belongs to this group alone
Essential Prime implicant
62
Assuming minterm expansions are used in a k-map, if some minterms, that represent one square each, has a value of 1, the square that that minterm represents is denoted with a _____
1
63
Assuming maxterm expansions are used in a k-map, if some maxterms, that represent one square each, has a value of 0, the square that that maxterm represents is denoted with a _____
0
64
Assuming either minterm or maxterm expansions are used in a k-map, if some minterms/maxterms, that represent one square each, is a dont care term, the square that that minterm/maxterm represents is denoted with a _____
X
65
In a K-map, are dont care terms(X) also included in the Grouping?
Yes
66
when Grouping in a k-map, is a group that only has dont care terms (X) valid?
no
67
The Logic gate that determines if the sum of the inputs is even or odd
Exclusive-OR Gate (XOR)
68
When The output of the XOR Gate is 0, the sum of its inputs is (even/odd)
even
69
When The output of the XOR Gate is 1, the sum of its inputs is (even/odd)
odd
70
The two universal gates (gates that can form any other gate using just themselves)
NAND and NOR
| Any gate can be formed with only NAND gates, or only with NOR gates
71
Half-Adders / Full-Adders have two output bits; the ___ bit and the ___ bit
Sum and Carry
72
Given the inputs X and Y, What is the boolean expression for the Sum bit of a Half-Adder Circuit
S = X ⊕ Y
73
Given the inputs X and Y, What is the boolean expression for the Carry bit of a Half-Adder Circuit
C = X ⋅ Y
74
The inputs of a Half-Adder are called _____
Augend and Addend
75
A Full Adder Circuit has ___ inputs and ___ outputs
3 inputs, 2 outputs
76
A Full Adder consists of ______
Two Half Adders
77
When the inputs of the Full Adder Circuit are X, Y and Z, Z represents the ______
Carry from a lower significant position
78
Given the inputs X, Y and Z, What is the boolean expression for the Sum bit of a Full-Adder Circuit
S = (X ⊕ Y) ⊕ Z
79
Given the inputs X, Y and Z, What is the boolean expression for the Carry bit of a Full-Adder Circuit
C = (X⋅Y) + Z⋅(X ⊕ Y)
80
Full Adders can be cascaded into _______
Ripple Carry Adders
81
For a Ripple Carry adder with 'n' bits, the number of Full Adders needed is ______
'n' #Full adders
82
It is considered as the basic storage unit, and is the building block of a Flip-Flop
Latch
83
The Two Inputs of an SR-Latch are ____ and ____
Set and Reset
84
Truth Table of an SR Latch
```
S | R | Remarks
---------------------
0 | 0 | retain
0 | 1 | reset
1 | 0 | Set
1 | 1 |Undefined
```
85
When Both Set and Reset have a value of '1', the situation is called _________
Race Condition (Circuit is confused, whether to set or reset, so it becomes a race to see which one of the two inputs become value '1' first)
86
A D-Latch has ___ Input/s
only one
87
When input D in a D-latch is '1', the output ____
Sets (1)
88
When input D in a D-latch is '0', the output ____
Resets (0)
89
Latches are circuits (with/without) clocks
without clocks
90
Bistable circuits built from latches, and uses a clock
Flip-Flop
91
Flip-Flips have __ inputs and ___ outputs
2 Inputs (J and K), 2 outputs (Q and Q')
92
When the Inputs of a JK Flip Flop are:
J = 0 , K = 0
the next state of the output (Q(t+1)) is ______
Q(t) (Retain previous state)
93
When the Inputs of a JK Flip Flop are:
J = 0 , K = 1
the next state of the output (Q(t+1)) is ______
0 (Reset)
94
When the Inputs of a JK Flip Flop are:
J = 1 , K = 0
the next state of the output (Q(t+1)) is ______
1 (Set)
95
When the Inputs of a JK Flip Flop are:
J = 1 , K = 1
the next state of the output (Q(t+1)) is ______
Q(t)' (Toggle: Next state is the complement of the previous state)
96
A Flip-Flop that uses only one input to change the next state
T-FlipFop (T Stands for "toggle")
97
When the Input T of a T-Flip Flop is 0
| the next state of the output (Q(t+1)) is ______
Q(t) (Retain previous state)
98
When the Input T of a T-Flip Flop is 1
| the next state of the output (Q(t+1)) is ______
Q(t)' (Toggle: Next state is the complement of the previous state)
99
A State Diagram that represents Present/Next States as Circles, and relates these circles with arrows that represent a specific combination of input and output in which if it occurs, present state(origin of arrow) shifts into the next state(destination of arrow)
Mealy model
100
A State Diagram that represents a combination of Present/Next States AND Output states as Circles, and relates these circles with arrows that represent a specific input in which if it occurs, the present state(origin of arrow) shifts into the next state(destination of arrow)
Moore Model
101
A technique used to simplify state diagrams, that can reduce the number of gates needed to produce the same output
State reduction
102
A Series of D-Flip Flops that store a number of bits
Register
103
Registers store/retrieve data either through _______ or ________ loading
Serial(Shift) or Parallel(Storage)
104
These are registers that go through a prescribed sequence
Counters
105
How are Ripple Counters Made?
Cascaded T-FlipFlops: output of one T-FlipFlop Serves as the clock of the next T-FlipFlop, the first T-FlipFlop requires a clock
106
When a Microelectronics circuit is said to be Synchronous, what does that mean?
All Clocks are Centralized: All Clocks of different circuits have to be timed perfectly/Synchronized
107
A Logic Family that uses Resistors
| Also, state its default gate
Resistor-Transistor Logic (RTL)
| NOR Gate
108
A Logic Family that uses diodes to control Ib, and provides power
Also, state its default gate
Diode-Transistor Logic (DTL)
| NAND Gate
109
A Logic Family that has +25V as its level '1' logic, and +5V as its level '0' logic
High Level Diode-Transistor Logic (HDTL)
110
A Logic Family that uses two or more transistors
| Also, state its default gate
Transistor-Transistor Logic (TTL or T²L)
| NAND gate
111
A Logic Family that Has a Shottky Diode connected across transistors to speed up switching
Shottky Transistor-Transistor Logic (STTL)
112
Considered the Fastest Logic Family, using complementary transistors(only one transistor is on at any given time) connected to a resistor
Emitter Coupled Logic (ECL)
113
A Logic Family that uses both NPN and PNP, and is commonly used in Large Scale Integration (LSI)
Emitter Follower Logic (EFL)
114
A Logic Family that improves Emitter Coupled Logic bu compressing it, and is commonly used in Large Scale Integration (LSI)
Emitter-Function Logic (EFL?)
115
A Logic Family that has less power consumption and has a high output impedance
PMOS - CMOS Logic
| P-Channel MOSFET
116
A Logic Family that uses an N-channel Enhancement Type MOSFET
NMOS Logic
117
A Logic Family that has lower power consumptopn, high impedance, and is faster than PMOS-CMOS Logic
NMOS Inverter Logic
118
A Logic Family that uses both P-channel and N-channel MOSFETS
CMOS Logic
| Complementary Metal Oxide Semiconductor FET
119
A Logic Family that has lower power consumptopn, high impedance, and is faster than Both PMOS-CMOS Logic and NMOS Inverter Logic
CMOS Inverter Logic
120
The 5 Computer Generations
```
1st - Electromechanical Calculators
2nd - Vacuum Tube Computers
3rd - Transistor Computers
4th - Integrated Circuit Computers
5th - VLSI Computers
```
121
Computers Accdg. to size and cost
1. ) PC
2. ) Minicomputer
3. ) Mainframe Computer
4. ) Supercomputer
122
ENIAC
- "Electronic Numerical Integrator and Computer"
- 1943, Mauchly & Eckert
- 18,000 Vacuum Tubes
- NOT a stored program Computer
123
EDVAC
- "Electronic Discrete Variable Automatic Computer"
- 1944, Mauchly & Eckert
- 1st Stored Program Computer
- 4000 Vacuum Tubes (improved compared to ENIAC)
124
EDSAC
- "Electronic Delay Storage Automatic Calculator"
- used one of the first assemblers, "Initial Orders"
- inputs are paper tape, output displayed on a teleprinter
- 3000 Vacuum Tubes
- Used Mercury Delay Lines to store memory
125
UNIVAC
- "Universal Automatic Computer"
- 1948
- Based on EDVAC
- 1st commerially available computer
126
Components of a CPU
1. ) Arithmetic Logic Unit (ALU)
2. ) Accumulators
3. ) Registers
4. ) Stacks
5. ) Control Unit
127
CPU Component that executes commands and manipulates data
Arithmetic Logic Unit (ALU)
128
CPU Component that holds data and instructions for further ALU Manipulation
Accumulator
129
A Special Register that keeps track/points to the address of the next instruction
Program Counter
130
A special register that holds the current instruction executed
Instruction Register
131
Temporary Data Storages in Sequential Order
Stacks
132
Stacks access/store data using this rule
Last in, First out (LIFO)
133
Fetches and Decodes the Incoming Instructions and generates signals for ALU operation
Control Unit
134
A Microprocessor's components communicate through a _____
bus
135
3 Types of Buses
Address Bus, Data Bus, and Control bus
136
The rate of a microprocessor that describes the number of instructions per second
Clock Rate
137
The rate of a microprocessor that describes the number of Floating Point Operations per second
Flops
138
The rate of a microprocessor that describes how many millions of instructions per second are executed
Mips
139
A Nibble has ___ bits
4 bits
140
A Byte has ___ bits
8 bits
141
a Half word has ___ bits
Up to 16 bits
142
a Word has __ bits
up to 32 bits
143
a double word has ___ bits
up to 64 bits
144
memory size is always a multiple of _____
2
145
Memory that contains text or graphics displayed on a screen of a terminal
Video Memory (VRAM)
146
Memory that holds the most recently read and most frequently used data for faster retrieval
Cache Memory
147
Memory that Contains the BIOS
Operating System Memory (OS Memory)
148
memory that serves temporary high speed data
Scratchpad memory
149
Four Semiconductor-Based memories
RAM, ROM, Programmable ROM(PROM), Eraseable PROM (EPROM)
150
Programs usually stored in a ROM or EPROM since it is not frequently changed
Firmware
151
RAM is a _____ Memory
Volatile
152
ROM, PROM, and EPROM are ______ Memories
Non-Volatile
153
Memory that requires no refreshing
Static Memory
154
Memory that requires refreshing
Dynamic Memory (DRAM)
155
rotating speed of hard/magnetic disk drives
4500-7200 RPM
156
Data in a Hard Disk Drive can be organized on the disk in 3 ways:
Tracks, Sectors, and Cylinders
157
____ is the term used when data is stored in concentric circles around the Hard Disk Drive
Tracks
158
____ is the term used when data is stored in pie slice-shaped sectors around the Hard Disk Drive
Sectors
159
____ is the term used when a specific data is stored as a numbered track on multiple Hard Disk Drives
Cylinder
160
The Read/Write Permissions of an Optical Drive
WORM (Write once, Read Many)
161
Two Types of Negative Numbers
Radix Minus One and True Complement
162
Another term for (n-1)'s Complement (n refers to the base of the number being complemented)
Radix Minus One Complement
163
Another term for (n)'s Complement (n refers to the base of the number being complemented)
True Complement
164
Two types of codes
- Weighted
| - Unweighted
165
Codes wherein the placement of the character in a line of code holds a specific weight, and their weighted sum represents the desired digit
Weighted Codes (ex. BCD and 2-4-2-1 Code)
166
Codes with no weight assigned, regardless of position of a character in a line of code
Unweighted Code (ex. Excess-3)
167
Three types of programming languages
- Machine Language
- Assembly Language
- High Level Language
168
A program that translates Assembly or High Level Languages into a Machine Language
Translator
169
A program that specifically translates Assembly into a Machine Language
Assembler
170
A program that specifically translates a High Level Language into a Machine Language
Compiler
171
BASIC
- "Beginner's All Purpose Symbolic Instruction Code"
| - Kemeny and Kurtz, mit 1960s
172
Considered as the "Lingua Franca" or bridging language of microcomputers
BASIC
173
COBOL
- "Common Business Oriented Language"
- English-Like Programming
- divided into: Identification, Environment, Data, and Procedure
174
FORTRAN
- "Formula Translation"
- First High Level Computer Language
- John Backus
- Compiled, Structured Language
175
The High Level Language considered as the progenitor of high level concepts like variables, conditional statements, etc.
FORTRAN
176
The High Level Language made by Nicolaus Wirth, Based on ALGOL, and Simplifies Syntax
PASCAL
177
Programming language developed by the US Department of Defense, named after Ada Byron
ADA
178
Programming language developed at Bell Labs, Standardized by ANSI, and is a structured programming language
C
179
Predecessor of C
B
| I Shit you not
180
The developer of C
Dennis Ritchie
181
A Low Level Language that allows Precise control over the microprocessor, and is faster compared to using a high level languange that have to use compilers
Assembly
182
Who invented the Integrated Circuit?
Jack Kilby
183
Where and when was the Integrated Circuit developed
Texas Instruments, 1958
184
The Cofounder of Fairchild Semiconductor(1957) and Intel(1968)
Robert Noyce
185
Robert Noyce is also dubbed as the "___________"
Mayor of Silicon Valley
186
Three IC Classifications Accdg. to Nature of signal
- Linear IC (Analog)
- Digital IC (Uses logic gates)
- Mixed IC (Digital and Analog)
187
Three IC Classifications Accdg. to Physical Structure
- Monolithic (Single Substrate)
- Film IC (Uses only passive networks, either thick or thin film)
- Hybrid IC (Combined Film and Monolithic)
188
The Law that dictates the trend of the number of transistors in an integrated circuit, in which it doubles every two years
Moore's law
189
The Law that dictates the trend of the hard drive storage capacity increasing at a similar rate to Moore's Law
Kryder's Law
190
The Law that dictates the trend of the amount of data transmitted through a Fiber Optic Cable, in which it doubles every 9 months
Butter's Law of Photonics
191
Also known as the "Pixels per dollar Law", that predicts the price of digicams, LCDs and LEDs based on their resolutions
Hendy's Law
192
Also Known as the "Great Moore's Law Compensator", where software's increasing processing power requirement increases in a way that offsets the performance gains predicted by Moore's law
Wirth's Law
193
The Law that dictates the trend of a library that expands doubly every 16 years, and due to this, advocates the digitizing of printed books to save space
Rider's Law
194
An IC Integration scheme that has less than 12 gates per chip
Small Scale Integration (SSI)
195
An IC Integration scheme that has 12-100 gates per chip, introduced in the late 1960s
Medium Scale Integration (MSI)
196
An IC Integration scheme that has more than 100 gates per chip, introduced in the mid 1970s
Large Scale Integration (LSI)
197
An IC Integration scheme that has more than 10,000 gates per chip, used from 1980s to present day
Very Large Scale Integration (VLSI)
198
An IC Integration scheme that has more than 1,000,000 gates per chip
Ultra Large Scale Integration (ULSI)
199
An IC Integration scheme that implements one whole silicon wafer as one "Superchip"
Wafer Scale Integration (WSI)
200
5 IC Fabrication Steps
1. ) Lithography
2. ) Etching
3. ) Deposition
4. ) Oxidation
5. ) Diffusion
201
In the Lithography process, a thin viscous liquid layer called _______ is placed on the wafer
Photo-resist
202
In the Lithography process, The Photo-resist hardens with baking, and is selectively removed by __________
Light Projection
203
In the Lithography process, the Light projected on the photoresist comes from a recticle containing a _____, that contains the circuitry to be etched on the wafer
mask
204
In the Etching process, the unwanted material is removed from the wafer surface, in which the _________'s pattern is transferred to the wafer by means of etching agents
Photoresist (From Lithography)
205
The process of applying various materials on the wafer surface for polishing the surface
Deposition
206
Two types of Deposition
- Physical Vapor Deposition
| - Chemical Vapor Deposition
207
The process of creating a silicon dioxide layer on the wafer through the use of oxygen molecules
Oxidation
208
Introduces dopant impurities into the semiconductor wafer, by accelerating Ions towards the wafer
Ion Implantation
209
The process of annealing the bombardament-induced lattice defects on the wafer produced by Ion Implantation
Diffusion
210
The Most Common Method of growing semiconductor crystals, discovered in 1916
Czochralski Method
211
Steps involving Czochralski Method
1. ) Melt Silicon (Silicon is MOLTEN HOT)
2. ) dip rod with a seed crystal attached at the end
3. ) rod is cooled, and is slowly retracted from the hot silicon melt
4. ) silicon crystal forms on the seed crystal as rod is pulled
212
In the Czochralski Method, The ________ the rod is pulled from the hot silicon melt, the greater the crystal quality
Slower
213
IC Temperature range codes:
C
C - Commecial (0° to 70 °C)
214
IC Temperature range codes:
I
I - Industrial (-25° to 85° C)
215
IC Temperature range codes:
M
M - Military (-55° to 125° C)
216
IC Packaging Codes:
D
D - Surface Mount Plastic DIL
217
IC Packaging Codes:
J
J -Ceramic DIL
218
IC Packaging Codes:
N or P
N or P - Plastic DIL, Sockets insertion
219
The IC Family consisting of TTL Logic Gates
7400 Series
220
The IC Family consisting of the 7400 series' CMOS Counterparts
4000 Series
221
World's First Microprcessor
Intel 4004
222
Some Notable Microprocessors
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Intel 8080
IBM 8088
MOS Technology 6502
Zilog Z80
Motorola 6800 Series
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223
The Process of removing Photoresist by dissolving in Alkaline
Development
224
Slices of Wafers are baked to diffuse concentrated impurity atoms into wafers (A doping process)
Diffusion Doping
225
When Thin Single Crystal layers are grown on a substrate
Epitaxial Growth
226
The process of connecting semiconductor devices together to form a circuit, by vapor deposition of aluminum
Metallization
227
Process of sealing off the surface to avoid contamination
Passivation
228
Material that is exposed to UV, and is developed prior to etching
Photoresist
229
A piece of finely polished glass, ceramic, and oxidized silicon
Substrate
230
Process of removing silicon crystal damage using an elevated temperature
Thermal Annealing
231
A Film in which it's thickness is at least 10 times greater than the mean free path of electrons (usually 10 μm)
Thick Film
232
A Film in which only uses passive components (usually 1 μm)
Thin Film
233
Because deposition of Aluminum is difficult with the presence of air, This Process was devised, using high temperature and low pressure
Vaccum Evaporation
