Computing Architectures & Performance History Flashcards
Q: What are the layers between high-level software and physical hardware?
A: Application → Operating System → Hypervisor → Instruction Set Architecture (ISA) → Microarchitecture → RTL → Gates → Physical circuits.
Q: What is the significance of the Instruction Set Architecture (ISA)?
A: ISA acts as the interface between software and hardware, defining the machine language understood by the processor.
Q: What does the performance-centric design approach include?
A: Shared memory architecture, memory hierarchy, pipelining, out-of-order execution, speculative execution, branch prediction, compiler optimizations, hardware accelerators, and virtual memory.
Q: What changed in processor performance growth around 1986?
A: Performance growth increased to ~52% per year due to architectural improvements like RISC.
Q: Why did performance growth slow after 2003?
A: Dennard scaling ended, and limits in instruction-level parallelism and power efficiency emerged.
Q: What is Amdahl’s Law?
A: A principle stating the potential speedup of a system is limited by the proportion of the program that cannot be parallelized.
Q: What has been the performance improvement rate since 2015?
A: Around 3.5% per year — doubling every ~20 years.
Q: What is Flynn’s Taxonomy?
A: A classification system for computer architectures based on instruction and data streams.
Q: What are the four classes in Flynn’s Taxonomy?
A: 1) SISD: Single instruction, single data stream
2) SIMD: Single instruction, multiple data streams
3) MISD: Multiple instruction, single data stream
4) MIMD: Multiple instruction, multiple data streams
Q: What is SISD?
A: A standard sequential processor — uniprocessor model using instruction-level parallelism.
Q: What is SIMD?
A: Executes the same instruction on multiple data elements in parallel — used in vector processing.
Q: What is MISD?
A: A theoretical model with no commercial implementation — executes multiple instructions on a single data stream.
Q: What is MIMD?
A: A flexible, parallel system where each processor has its own instructions and data — used in multi-core and distributed systems.
Q: What does RISC stand for?
A: Reduced Instruction Set Computer.
Q: What does CISC stand for?
A: Complex Instruction Set Computer.
Q: What is the key difference between RISC and CISC?
A: RISC uses fewer, simpler instructions that execute in one clock cycle; CISC uses more complex instructions that may take multiple cycles.
Q: What are some characteristics of RISC architectures?
A: - Small, simple instruction set
- Fixed-length instructions
- Load/store architecture
- Single-cycle execution
- Efficient pipelining
- Large register file
- Compiler-dependent optimization
Q: What is a load/store architecture?
A: Only load and store instructions access memory; all other operations occur on registers.
Q: How does RISC benefit from pipelining?
A: Uniform instruction execution makes pipelining easier and more efficient.
Q: Why is compiler optimization important in RISC?
A: RISC relies on compilers to efficiently schedule simple instructions and minimize stalls.
Q: Name examples of RISC architectures.
A: ARM, MIPS, SPARC, PowerPC.
