Computing Architectures & Performance History Flashcards

(18 cards)

1
Q

Q: What are the layers between high-level software and physical hardware?

A

A: Application → Operating System → Hypervisor → Instruction Set Architecture (ISA) → Microarchitecture → RTL → Gates → Physical circuits.

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2
Q

Q: What is the significance of the Instruction Set Architecture (ISA)?

A

A: ISA acts as the interface between software and hardware, defining the machine language understood by the processor.

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3
Q

Q: What does the performance-centric design approach include?

A

A: Shared memory architecture, memory hierarchy, pipelining, out-of-order execution, speculative execution, branch prediction, compiler optimizations, hardware accelerators, and virtual memory.

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4
Q

Q: What is Amdahl’s Law?

A

A: A principle stating the potential speedup of a system is limited by the proportion of the program that cannot be parallelized.

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5
Q

Q: What is Flynn’s Taxonomy?

A

A: A classification system for computer architectures based on instruction and data streams.

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6
Q

Q: What are the four classes in Flynn’s Taxonomy?

A

A: 1) SISD: Single instruction, single data stream
2) SIMD: Single instruction, multiple data streams
3) MISD: Multiple instruction, single data stream
4) MIMD: Multiple instruction, multiple data streams

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7
Q

Q: What is SISD?

A

A single processor executes one instruction at a time on a single data point. This means instructions and data are processed sequentially, rather than in parallel.

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8
Q

Q: What is SIMD?

A

A parallel processing technique where a single instruction is applied to multiple data elements simultaneously, allowing for faster processing of repetitive tasks — used in vector processing.

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9
Q

Q: What is MISD?

A

A: A theoretical parallel model with no commercial implementation — executes multiple instructions on a single data stream, but using different instructions.

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10
Q

Q: What is MIMD?

A

A: A flexible, parallel system where multiple processors independently execute different instructions on different data streams concurrently — used in multi-core and distributed systems.

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11
Q

Q: What does RISC stand for?

A

A: Reduced Instruction Set Computer.

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12
Q

Q: What does CISC stand for?

A

A: Complex Instruction Set Computer.

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13
Q

Q: What is the key difference between RISC and CISC?

A

A: RISC uses fewer, simpler instructions that execute in one clock cycle; CISC uses more complex instructions that may take multiple cycles.

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14
Q

Q: What are some characteristics of RISC architectures?

A

A: - Small, simple instruction set
- Fixed-length instructions
- Load/store architecture
- Single-cycle execution
- Efficient pipelining
- Large register file
- Compiler-dependent optimization

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15
Q

Q: What is a load/store architecture?

A

A: Only load and store instructions access memory; all other operations occur on registers.

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16
Q

Q: How does RISC benefit from pipelining?

A

Their simpler fixed-length instruction formats allow for more predictable and efficient execution of the different stages of instruction processing. This leads to a higher throughput of instructions

17
Q

Q: Why is compiler optimization important in RISC?

A

A: RISC relies on compilers to efficiently schedule simple instructions and minimize stalls.

18
Q

Q: Name examples of RISC architectures.

A

A: ARM, MIPS, SPARC, PowerPC.