Debugging

Question 1

What is the problem with printf for debugging

Answer 1

• Lots of work
• output is buffered
• trave statements mess up output

Question 2

How do you use lldb(mac) or gdb(linux)?

Answer 2

Compiling:

clang -g -O0

Then run the executable in the debugger:

lldb a.out

Question 3

What are the basic lldb commands?

Answer 3

• r - run
• b 18 - breakpoint set
• s - step - stepping in to functions
• n - next: stepping over function calls
• c - continue execution

Question 4

Why use a a Makefile?

Answer 4

Single-file programs do not work well when code gets large

• compilation can be slow
• hard to collaborate between multiple programmers
• cumbersome to edit

Large programs are split into multiple files:

• each file represents a partial program or module
• modules can be compiled separately or together
• modules can be shared between multiple programs

Question 5

What are bad ways to compile programs with modules?

Answer 5

• Includning .c files
• multifile compilation (.c and .o files)

Question 6

How do you work around having similar variables or function names when compiling multiple files

Answer 6

• static is the preferred method(like private in Java)
• use static for functions you odnt want exposed

Question 7

How is static used for variables/functions and inside functions

Answer 7

static used on variable or function makes it not visible or accessable by other files.

Inside a function makes the variable maintain it’s value and doesn’t reset after function calls

Question 8

What is make?

Answer 8

A utility for automatically compiling executables and libraries from source code

Question 9

What is makefile?

Answer 9

• a script file that defines rules for what must be compiled and how to compile it
• compare file modification dates and to rebuild any file A dependant on another file B that has changed more recently than A

Question 10

What are the makefile rule/syntax

Answer 10

1. Command line but be indented by a single tab(spaces don’t work)
2. make target - uses the file named Makefile in the current dir
3. find rules for Makefile for building target
   
   • if the file needs to be updated, it is
4. alt
   
   1. make (builds first target in Makefile
   2. make -f makefilename, make -f makefilename target
      
      • uses a filename other than Makefile
5. clean:
   
   • rm file1.o file2.0 file3.0 myprog
   • is convention for removing all compiled files(but not source or header files)
6. all: myprog myprog2
   
   • has no commands but depends on myprog and myprog2
   • make all ensures that myprog, myprog2 are up to date
   • all rule often put first, so that typing make will build everything

Question 11

How do makefile variables work?

Answer 11

define a variable:

NAME = value

$(NAME)

OBJFILES = file.0 file2.0 file3.0

PROGRAM = myprog

$(PROGRAM): $(OBJFILES)

clang -g -Wall -o $(PROGRAM) $(OBJFILES)

clean:

rm $(OBJFILES) $(PROGRAM)

Question 12

How do you tell a makefile where your header files are located?

Answer 12

clang -I ./include

Question 13

What are the common causes of errors during linking?

Answer 13

• missspellings
• missing files
• missing libraries