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Microprocessors > Chapter 3 and 4 (โ€‹๐˜ฃ๐˜บ ๐˜‘๐˜ฆ๐˜ง๐˜งโ€‹) > Flashcards

Chapter 3 and 4 (โ€‹๐˜ฃ๐˜บ ๐˜‘๐˜ฆ๐˜ง๐˜งโ€‹) Flashcards

1
Q

transfers a copy of a byte or word from the source addressing register or contents of a memory location to the destination register or memory location

A

Register Addressing

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2
Q

most common form of data addressing and, once the register names are learned, is the easiest to apply

A

Register Addressing

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3
Q

transfers the source, an immediate byte, word, addressing doubleword, or quadword of data, into the destination register or memory location

A

Immediate Addressing

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4
Q

data immediately follow the hexadecimal opcode in the memory

A

Immediate Addressing

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5
Q

directs the assembler to assemble the program into a single code segment.

A

.MODEL TINY

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6
Q

indicates the start of the code segment

A

.CODE

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7
Q

statement indicates the starting instruction in the program

A

.STARTUP

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8
Q

causes the program to exit to DOS.

A

.EXIT

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9
Q

indicates the end of the program file.

A

END

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10
Q

moves a byte or word between a memory location and a register

A

Direct Addressing

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11
Q

transfers data between a memory location, located within the data segment, and the AL (8-bit), AX (l6-bit), or EAX (32-bit) register

A

Direct Addressing

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12
Q

3 bytes wide

A

Direct Addressing

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13
Q

almost identical to direct addressing, except that the instruction is 4 bytes wide instead of 3

A

Displacement Addressing

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14
Q

inform the assembler where the data segment begins.

A

.DATA

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15
Q

allows one data segment and one code segment.

A

SMALL model

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16
Q

transfers a byte or word between a register and a memory location addressed by an index or base register

A

Register indirect addressing

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17
Q

allows data to be addressed at any memory location through an offset address held in any of the following registers: BP, BX, DI, and SI.

A

Register indirect addressing

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18
Q

transfers a byte or word between a register and the memory location addressed by a base register (BP or BX) plus an index register (DI or SI)

A

Base-plus-index addressing

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19
Q

moves a byte or word between a register and the memory location addressed by an index or base register plus a displacement

A

Register relative addressing

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20
Q

transfers a byte or word between a register and the memory location addressed by a base and an index register plus a displacement.

A

Base relative-plus-index addressing

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21
Q

The second register of a pair of registers is modified by the scale factor of to generate the operand memory address

A

Scaled-Index Addressing

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22
Q

is available only in the 80386 through the Pentium 4 microprocessor

A

Scaled-index Addressing

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23
Q

only available to the 64-bit extensions on the Pentium 4 or Core2

A

RIP relative addressing

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24
Q

allows access to any location in the memory system by adding a 32-bit displacement to the 64-bit contents of the 64-bit instruction pointer

A

RIP relative addressing

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25
used to specify how information is stored in a memory array and can be quite useful with applications that use arrays
Data Structure
26
name of memory address
label
27
last-in, first-out
LIFO
28
data are placed onto stack using this
PUSH Instruction
29
data are removed
POP Instruction
30
Data Addressing Modes
* Register * Immediate * Direct * Register Indirect * Base plus-index * Register relative * Base relative-plus-index
31
Program Memory-addressing Modes
* Direct * Relative * Indirect addressing
32
Instruction that copies content of the source operand into the destination operand; Source never changes
MOV
33
Specifies any 8-bit register or 16-bit register
Register Addressing
34
Instruction that transfers byte or word that immediately follows the opcode into the register or memory location
MOV Immediate
35
Relative to the instruction pointer
Relative
36
identify the start of a file and the type of memory model used with the file
.MODEL
37
Program exists in one segment, the code segment, and is assembled as a command (.COM) program
TINY
38
program uses a code and data segment and assembles as an execute (.EXE) program
SMALL
39
used to transfer data between EAX, AX, or AL and memory
direct addressing
40
3 bytes of memory
direct addressing
41
used with any register-memory transfer
displacement addressing
42
4 bytes of memory
displacement addressing
43
native binary code that the microprocessor understands and uses as its instructions to control its operation
Machine Language
44
selects the operation (addition, subtraction, move, and so on) that is performed by the microprocessor
Opcode
45
specifies the addressing mode (MOD) for the selected instruction
MOD Field
46
If the MOD field contains a 00, 01, or 10, the R/M field takes on a new meaning.
R/M Memory Addressing
47
occurs whenever memory data are referenced by only the displacement mode of addressing for 16-bit instructions
Special Addressing Mode
48
*found in the 80386 and above are obtained by either running these machines in the 32-bit instruction mode or in the 16-bit instruction mode by using the address-size prefix 67H
32-bit addressing Modes
49
If the contents of a segment register are moved by the MOV, PUSH, or POP instructions, a special set of register bits (REG field) selects the segment register
Segment MOV Instructions
50
REX
Register Extension
51
SIX FORMS OF PUSH AND POP
* Register * Memory * Immediate * Segment register * Flags * All registers
52
Copies the contents of the internal register set, except the segment registers, to the stack.
PUSHA
53
PUSHA
Push all
54
Copies the contents of the flag register to the stack
PUSHF
55
PUSHF
Push Flags
56
PUSHAD
Push All Double
57
performs the inverse operation of a PUSH instruction
POP
58
removes data from the stack and places it into the target 16-bit register, segment register, or a 16-bit memory location
POP
59
POPF
Pop flags
60
removes a 16-bit number from the stack and places it into the flag register
POPF
61
POPFD
Pop flags double
62
removes a 32-bit number from the stack and places it into the extended flag register.
POPFD
63
removes 16 bytes of data from the stack and places them into the following registers, in the order shown: DI, SI, BP, SP, BX, DX, CX, and AX
POPA
64
POPA
Pop All
65
LEA
Load-effective address
66
loads a 16- or 32-bit register with the offset address of the data specified by the operand
LEA
67
LDS
Load data segment
68
LES
Load extra segment
69
LFS
Load pointer using FS
70
LGS
Load pointer using GS
71
LSS
Load pointer using SS
72
loads AL, AX, or EAX with data stored at the data segment offset address indexed by the SI register.
LODS
73
LODS
Load String Operand
74
STOS
Store String data
75
STOSB
Stores a byte
76
CMOV
Conditional move
77
REP
Repeat prefix
78
MOVS
Move string
79
* transfers data from one memory location to another
MOVS
80
* transfers a byte, word, or doubleword of data from an I/O device into the extra segment memory location addressed by the DI register
INS
81
INS
input string
82
OUTS
output string
83
* transfers a byte, word, or doubleword of data from the data segment memory location address by SI to an I/O device
OUTS
84
* exchanges the contents of a register with the contents of any other register or memory location
XCHG
85
XCHG
Exchange
86
* Load status flag into AH register
LAHF
87
LAHF
* Load All from Flags
88
SAHF
* Store all to flags
89
XLAT
* Translate
90
converts the contents of the AL register into a number stored in a memory table
XLAT
91
MOVSX
* move and sign-extend
92
MOVZX
* move and zero-extend
93
BSWAP
* byte swap
94
* takes the contents of any 32-bit register and swaps the first byte with the fourth, and the second with the third
BSWAP
95
CMOV
* conditional move
96
* class of instruction is new to the Pentium Proโ€“Core2 instruction sets.
CMOV
97
* allows the programmer to deviate from the default segment
SEGMENT OVERRIDE PREFIX
98
* indicate how an operand or section of a program is to be processed by the assembler.
Directives
99
DB
* Define byte
100
DW
* Define word
101
DD
* Define doubleword
102
DQ
* Define quadword
103
DT
* Define ten bytes
104
EQU
* Equate directive
105
ORG
* Origin
106
* changes the starting offset address of the data in the data segment to location 300H
ORG
107
* tells the assembler what names have been chosen for the code, data, extra, and stack segments
ASSUME
108
PROC
* Procedure (?)
109
ENDP
End Procedure
110
MASM
* Microsoft Macro Assembler
111
ASM
* Assembler
112
TASM
* Turbo Assembler

Microprocessors (28 decks)

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