Fetch Execute Cycle Flashcards Preview

Computer Science > Fetch Execute Cycle > Flashcards

Flashcards in Fetch Execute Cycle Deck (15)
Loading flashcards...
1

General purpose
register

a register not assigned a specific role by the processor designer. Programmers may use general-purpose registers.

2

Dedicated
register

a register assigned a specific role by the processor designer. Programmers may use some but not all dedicated registers

3

Program Counter

Stores the address of the next instruction to be executed

4

Memory Address Register

Stores the data or instruction being transferred to and from the immediate access store

5

Current Instruction Register

Register that is part of a CPU's control unit and stores
the instruction currently being executed or decoded.

6

Accumulator

Stores results of arithmetic and logic operations

7

Bus

Set of parallel wires connecting independent components of a computer system

8

Address bus

Carries an identification (i.e. physical address) about where the data are being sent (uni-directional)

9

Data bus

Carries the actual data or instruction to be processed between the CPU and the other internal components such as main memory and I/O ports (bidirectional)

10

Control bus

Carries commands from the control unit and returns status signals from the devices such as timing signals,
acknowledgement signals and read/write signals (bidirectional)

11

ALU

Arithmetic Logic Unit. A digital circuit (component) used to process and manipulate data / performs calculations / logical operations.

12

Control Unit

It is a component of a CPU. Control unit directs the operations of the processor. It tells the computer's memory, arithmetic/logic unit and input and output devices how to respond to a program's instructions.

13

Decoder

The decoder is the circuit inside the control unit that decodes an op-code from the CIR.

14

Memory Data/Buffer Register

A two-way register that holds data fetched from memory ( and ready for the CPU to process) or data waiting to be stored in memory)

15

Fetch execute cycle

PC -next address
MAR