CS401A's Midterms: Comp. Sys. Architect Module 04 Flashcards

For midterms or final exams. (70 cards)

1
Q

holds instructions (code) and data.

A

A memory

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2
Q

It plays an important part of a computer performance.

A

A memory

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3
Q

Memory

is a type of memory with small capacity.

A

Register

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4
Q

Memory

It can be described as a one-dimensional matrix of cells used to store and retrieve data.

A

Register

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5
Q

Memory

There are two types of memory used in a computer:

A
  • Primary
  • Secondary

(Semiconductors — RAM & ROM)
(HDD, SDD, Flash, Tape, Disk & Optical Drives, etc.)

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6
Q

Memory

Types of semiconductor memory:

A
  • Volatile memory
  • Nonvolatile memory
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7
Q

Memory

○ It needs constant power to retain data. Its contents are lost when power is removed from it.

○ Example: Random Access Memory and Cache Memory

A
  • Volatile memory
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8
Q

Memory

○ It keeps its contents even without power. It can retrieve stored information even after having been power cycled.

○ Example: Read-Only Memory and Flash Memory

A
  • Nonvolatile memory
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9
Q

Memory

This is a volatile type of memory.
because any storage location can be accessed directly.

A

It is called “Random Access” Memory (RAM)

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10
Q

Memory

  • The data bus allows the passage of data in or out of the
A

RAM (Random Access Memory).

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11
Q

Memory

  • The address bus is used to select a memory location.
A

Random Access Memory (RAM)

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12
Q

Memory

  • The read signal activates when reading data from
A

RAM (Random Access Memory).

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13
Q

Memory

  • The write line activates when writing to the
A

RAM (Random Access Memory).

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14
Q

Memory

  • RAM Operations:
A

Read, Write, and Chip Select.

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15
Q

Memory

Types of RAM

A
  • Static RAM (SRAM)
  • Dynamic RAM (DRAM)
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16
Q

Memory

is almost 20 times faster and is much more expensive than DRAM.

A
  • Static RAM (SRAM)
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17
Q

Memory

is a one-bit static RAM.

A

D Flip Flop

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18
Q

* Static RAM (SRAM)

Cache

A

(L1, L2, L3)

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19
Q

Memory

uses fewer components to make one (1) bit; therefore, it can design
integrated circuit (IC) with a large capacity of 4 GB per IC.

A
  • Dynamic RAM (DRAM)
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20
Q

Memory

— It allows faster access to data in the same row or page.

A

Fast Page Mode RAM (FPMRAM)

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21
Q

Memory

works by eliminating the need for a row address if data is located in the row previously accessed.

A

Page-mode memory
Fast Page Mode RAM (FPMRAM)

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22
Q

Memory

— It transfers blocks of data to or from the memory.

A

Extended Data Out (EDORAM)

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23
Q

Memory

— This technology uses DRAM and adds a special interface for synchronization.

A

Synchronous DRAM (SDRAM)

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24
Q

Memory

It can run at much higher clock speeds than DRAM.

A

Synchronous DRAM (SDRAM)

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25
# **Memory** — This was developed by Rambus Corporation.
○ *Rambus DRAM (RDRAM)*
26
# **Memory** — It uses multiple DRAM banks with a new interface that enables DRAM banks to transfer multiple words and transfer data at the rising edge and the falling edge of a clock.
○ *Rambus DRAM (RDRAM)*
27
# **Memory** — It is a type of SDRAM that transfers data for both rising edge and falling edge of the clock.
○ *Double Data Rate SDRAM (DDR SDRAM)*
28
# **Memory** It can move data twice as fast than SDRM; therefore, memory can run at the ½ clock rate.
○ *Double Data Rate SDRAM (DDR SDRAM)*
29
# **Memory** *Types of RAM Packaging*
* **Single In-line Memory Module (SIMM)** * **Dual In-line Memory Module (DIMM)** * **Rambus In-line Memory Module (RIMM)**
30
# **Memory** is a small circuit board where one (1) side of the board holds several chips.
* **Single In-line Memory Module (SIMM)**
31
# **Memory** is a circuit board, in which both sides of the board hold several memory chips but has a 64 bit data bus
* **Dual In-line Memory Module (DIMM)**
32
# **Memory** — It is a small version of DIMM used commonly in notebook computer.
○ **SO-DIMMM (Small Outline)**
33
# **Memory** — It is a competing memory used on laptops and mostly supports 144 and 172 pins.
○ **Micro-DIMM**
34
# **Memory** is similar to a DIMM package but used different pin settings in which it contains 184 or 232 pins.
* **Rambus In-line Memory Module (RIMM)**
35
# **Memory** From the term, information can be "read" only from this type of memory.
**Read-Only Memory**
36
# **Memory** It holds information permanently even while there is no power It is a nonvolatile type of memory.
**Read-Only Memory** to the ROM.
37
# **Memory** *Types of ROM*
* **Programmable ROM (PROM)** * **Erasable PROM (EPROM)** * **Electrically EPROM (EEPROM)**
38
# **Memory** is a memory chip where data can be written only once.
* **Programmable ROM (PROM)**
39
# **Memory** can be erased with ultraviolet light and reprogrammed with a device called an
* **Erasable PROM (EPROM)** EPROM programmer.
40
# **Memory** Flash ROM is a type of
EEPROM **(Electrically EPROM)**.
41
# **Memory** can be erased by applying specific voltage to one of its pins and can be reprogrammed with an ## Footnote *Example:* NAND Flash Memory and BIOS
* **Electrically EPROM (EEPROM)** EPROM programmer.
42
# **Memory** — It is a nonvolatile memory that has a wide range of applications ## Footnote applications such as flash drive, solid-state drive, memory card, and embedded system.
○ **Flash Memory**
43
# **Memory** It is a type of EEPROM that allows multiple memory location to be written or erased on one (1) operation.
○ **Flash Memory**
44
# **Memory** There are two (2) types of technology used for flash memory:
NAND and NOR flash memories.
45
# **Memory** has smaller access time than NOR flash memory. Most flash memories use
NAND flash memory NAND technology.
46
# **Memory** It is the delay in transmission of data through the circuites of a computer's microprocessor.
**What is computer bottlenecking?**
47
# **Memory** The delay typically occors when a system's bandwidth cannot support the amount of information being relayed at the speed it is being processed.
**What is computer bottlenecking?**
48
# **Memory** A partition is a defined area in memory that stores a program to be executed.
**Memory Partitioning**
49
# **Memory** is a defined area in memory that stores a program to be executed.
A partition
50
# **Memory** defines the processes that could execute in the specific partition.
The partition size
51
# **Memory** determines the number of processes that could run concurrently.
The number of partition defined
52
# **Memory** — The main memory is divided into several static partitions at system generation time.
* **Fixed Partitioning**
53
# **Memory** A process may be loaded into a partition of equal or greater size. ## Footnote ○ Possibilities: *Equal size partitioning and unequal size partitioning*
* **Fixed Partitioning**
54
# **Memory** — The partitiones are of variable length and number. ## Footnote ○ Possibilities: *Small holes in memory and external fragmentation*
* **Dynamic Partitioning**
55
# **Memory** When a process is brought into main memory, it is allocated exactly as much memory as it requires and no more.
* **Dynamic Partitioning**
56
# **Memory** It is used for storing application data and instructinos that are currently not needed to be process by the CPU.
**Virtual Memory**
57
# **Memory** It also enables a system to run application larger than main memory. The hard disk drive (HDD) or solid state drive (SSD) is extended as part of the memory and includes allocations and addresses.
**Virtual Memory**
58
# **Memory** It was the name chosen to represent the level of the memory hierarchy between the processor and main memory.
**Caching**
59
# **Memory** also refers to any storage managed to take advantage of locality of reference.
The term "caching"
60
# **Memory** Its main contribution is in improving the execution speed. Its properties include reduction of latency, more capacity, and cache availability.
**Caching**
61
# **Memory** *Types of Cache Memory*
* L1 Cache (Primary Cache) * L2 Cache (External Cache) * L3 Cache (Shared Cache)
62
# **Memory** — This cache level is as fast as the processor because it is embedded in the processor.
* L1 Cache (Primary Cache)
63
# **Memory** — This cache level is used to catch recent data access from the processor not caught by Level 1.
* L2 Cache (External Cache)
64
# **Memory** — This cache catches the recent data all across CPU cores; this is usually slower than L1 and L2.
* L3 Cache (Shared Cache)
65
# **Memory** It is the tendency of a processor to access the same set of memory locations repetitively over a short time.
**Locality of Reference**
66
# **Memory** — A resource that is referenced at one (1) point in time is referenced again soon after.
* *Temporal Locality*
67
# **Memory** — The likelihood of referencing a storage location is greater if a storage location near it has been recently referenced.
* *Spatial Locality*
68
# **Memory** Accessing a cache is based on the following predictions:
* *Cache Hit* * *Cache Miss*
69
# **Memory** — looking for the same piece of data again.
* *Cache Hit*
70
# **Memory** — data that isn't in the cache; it causes latency and delay.
* *Cache Miss*