Midterm Flashcards

1
Q

How does a server chipset act to control system-wide latency?

A

Controls the data flow between the CPU, caches, and memory.

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2
Q

Matching the server chipset to the server CPU helps to minimize what?

A

Bottlenecks

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3
Q

In servers the two commonly used multi-processor architectures are? (No acronyms)

A

Symmetric Multiprocessing, Non-Uniform Memory Access

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4
Q

The acronym PCI stands for what?

A

Peripheral Component Interface / Interconnect

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5
Q

IBM refers to the PCI bus as what?

A

Multiplex address and data bus

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6
Q

What is the PCI turnaround phase?

A

The transition from Data mode to address mode, or visa versa.

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7
Q

Most IBM X System Servers have replaced PCI-X with what?

A

PCI Express

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8
Q

QDR transfers how many data bit per clock cycle?

A

4

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9
Q

A PCI Express Serial link uses two wire pairs, what is the role of each pair?

A

One to send and one to receive

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10
Q

PCI Express devices look like what types of devices to software?

A

PCI devices

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11
Q

What is the major design difference between PCI-E and the previous versions of PCI?

A

PCI-Express is serial, everything else is parallel.

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12
Q

According to Moores Law the numbers of transistors in CPUs doubles how many years?

A

Every 2

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13
Q

The acronym UEFI stands for what?

A

Unified Extensible Firmware Interface

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14
Q

UEFI was originally designed for what processor?

A

Itanium

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15
Q

UEFI was designed to replace what in a server?

A

BIOS

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16
Q

What does UEFI component testing eliminate?

A

Beep Codes

17
Q

What was the first version of Windows Server to support UEFI?

A

2008

18
Q

Under virtualization what normally runs under privilege level 3?

A

Applications

19
Q

Under virtualization what normally runs under privilege level 0?

A

Virtualization layer

20
Q

What is the role of the hypervisor?

A

Allows multiple OS’ to run on a single host?

21
Q

What does binary translation address?

A

Ring deprivileging

22
Q

There are three hardware requirements for virtualization, one is hypervisor support, one is BIOS support, what is the third?

A

CPU support

23
Q

The acronym ACPI stands for what?

A

Advance configuration power interface

24
Q

How does the P state differ from the T state?

A

P state addresses the clock rate and the T state addresses how many clock ticks the CPU will respond to

25
Q

The NIC receive frame command contains what things requires to store the receive frames contents?

A

Receive Instruction and the Address

26
Q

What type of server has a primary function of storing, searching, retrieving, and updating data?

A

Database server

27
Q

What is often because of major bottlenecks in a DNS server?

A

The NIC

28
Q

Explain the difference between active memory and MXT?

A

Active memory mirrors the memory, while MXT compresses it.

29
Q

An average enterprise uses what percent of a server’s capacity?

A

20%

30
Q

The ability to change P-States is an ability Intel calls what?

A

Demand Based Switching

31
Q

Same question but for AMD?

A

PowerNow!

32
Q

What is the effect of increased cache size on the speed of main memory access?

A

Slows it down

33
Q

What is the most frequently access server hardware resource?

A

Memory

34
Q

AMD uses HyperTransport together with that other technology to group processors?

A

SUMO

35
Q

AMD uses three HyperTransport links to connect the opteron what is each link used for?

A

Two to connect to connect to CPU, Third for I/O.