Chapter 6: Processor Subsystem Flashcards Preview

CISA-2110 Server Hardware > Chapter 6: Processor Subsystem > Flashcards

Flashcards in Chapter 6: Processor Subsystem Deck (27):
1

According to IBM, which Intel Xeon processor is designed for virtualization environments?

Xeon 7400 Series

2

How large is the external cache line in the NetBurst Architecture?

64-bytes

2

Which Intel Xeon CPU Architecture uses Simultaneous Multi-threading?

Nehalem

3

The Xeon MP Tulsa Range of frequencies from?

2.5 to 3.2 GHz

3

With two CPUs, expect how much improvement when you double the L2 cache size

4% to 6%

4

According to IBM which Intel Xeon CPU is known as the workhorse processor?

Xeon 5500 Series (Gainestown)

4

Netburst architecture can support a what clock rate

5Ghz

4

What three small processors have recently been introduced in the server environment?

ARM, Snapdragon (Qualcomm), and Atom (Intel)

4

With four CPUs, expect how much improvement when you double the L2 cache size

8% to 10%

5

In Split-Plane or Dual Dynamic Power Management (DDPM) CPUs the Power Supply for the Core is?

Independent to the core

7

What was the first first Intel processor to use lower power consuming Intel Core Architecture over the older Netburst architecture?

Intel Xeon 5100 (Woodcrest)

7

Intel Wide Dynamic Execution allows how many instructions to be processed simultaneously?

4

8

Which Intel CPU introduced demand-based switching?

Intel Xeon 5100 (Woodcrest)

10

Which Intel Xeon CPU Architecture has shared last level cache?

Nehalem

12

What advantage do Switched Nodes offer over other FSB technologies?

Increased throughput

13

With eight CPUs, expect how much improvement when you double the L2 cache size

10% to 15%

14

NetBurst Architecture is usable up to how many cores?

2

15

Electron leakage results in what?

Large power consumption

16

The Xeon DP Woodcrest Range of frequencies from?

1.6 to 3.0 GHz

17

EPIC stands for what?

Explicitly Parallel Instruction Computing

19

In a Switched Fabric Topology, what device is used to connect the nodes to each other?

A Switch

21

Which Intel CPU replaced Core Microarchitecture with Nehalem Microarchitecture

Xeon 5500 Series (Gainestown)

23

With the increase of clock rate in NetBurst, you also have an increase in what?

Heat and Power Consumption

24

With Intel Wide Dynamic Execution, Some instructions can be combined into a single instruction using the technique of?

Macrofusion

25

Which AMD CPU managed cache transfers through a crossbar switch?

Revision F Opteron

26

Was it AMD or Intel who released the first backwards compatible 64bit CPU?

AMD

27

What was the first Intel dual core to include an included shared L3 cache?

Intel Xeon 7100 (Tulsa)