Instruction Sets Flashcards

Week 5 -10 (26 cards)

1
Q

what is instruction set architecture

A

the structure of a computer that a machine language programmer (or a compiler) must understand to write a correct (timing independent) program for that machine

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
2
Q

what does the ISA define

A
  • operations that the CPU can execute
  • data transfer mechanism + how to access data
  • control mechansim (branch, jump, etc.)
  • ‘contract’ between programmer/compiler & hardware
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
3
Q

what are the elements of an instruction

A
  1. opcode - do this
  2. source operand reference - from this
  3. result operand reference - put the answer here
  4. next instruction reference - when you have done that, do this
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
4
Q

C= A + B under stack ISA

A

push A
push B
add pop C

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
5
Q

pros of stack ISA

A
  • compact code
  • low hardware requirements
  • easy to write a simpler compiler
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
6
Q

C = A + B under accumulator ISA

A

load A
add B
store C

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
7
Q

C = A + B under register (register-memory) ISA

A

load R1, A
add R2, B
store C, R1

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
8
Q

C = A + B under register (load-store) ISA

A

load R1, A
load R2, B
add R3, R1, R2
store C, R3

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
9
Q

pros of register ISA

A
  • GPR faster than main memory - values available immediately
  • convenient for program variables
    • compiler assigns variables to registers
    • more compact code as small fields specify registers
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
10
Q

cons of register ISA

A
  • need to save & restore during function calls
  • field size
  • compiler must manage
  • limited number
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
11
Q

name the 6 memory addressing modes

A
  1. direct
  2. register indirect
  3. memory indirect
  4. displaced or based
  5. indexed
  6. auto inc/decrement
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
12
Q

what is register indirect addressing

A

use the content stored at R1 as the address

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
13
Q

what is memory indirect addressing

A

use the value at mem[1001] as address

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
14
Q

what is displaced or based addressing

A
  • use 20 + (R1) as address
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
15
Q

what is auto inc/decrement addressing

A

use (R1) as address, add inc. or dec. to R1

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
16
Q

what makes a good ISA

A
  • ease of implementation
  • ease of programming
  • future compatability
17
Q

what are expanding opcodes

A
  • a compromise between a bigger set of opcodes and the desire to make opcodes short
  • short opcodce= ^ operand
  • v operand = ^ opcode space
18
Q

how many bits does 15 instructions with 3 addresses account for

A

15 x 2^4 x 2^4 x 2^4 = 15 x 2^12 bits

19
Q

how many bits does 14 instructions with 2 addresses account for

A

14 x 2^4 x 2^4 = 14 x 2^8 bits

20
Q

how many bits does 3 instructions with 2 3-bit operands account for

A

3 x 2^3 x 2^3 = 3 x 2^6 bits

21
Q

how many bits does 2 instructions with 1 4-bit operand account for

22
Q

define RISC

A

Reduced Instruction Set Computer
- simple operations
- simple data movements - 1 address mode
- simple instruction encoding - all instructions encoded in the same number of bits
- less complex (powerful) instructions
- shorter instructions
- ^ instructions per program
- faster fetch/execution of instructions
- compilers do the hardwork

23
Q

define CISC

A

Complex Instruction Set Computer
- more complex (powerful) instructions
- more registers - inter-register operations are quicker
- fewer instructions per program
- variable length ISA
- ALU operations can be register-register & register-memory
- multiple memory accessing modes
- simple compilers
- code compactness

24
Q

types of interrupts

A
  1. program, - overlow, division by zero, etc
  2. timer - mark the passage of time, etc
  3. I/O - peripherals & other devices that need attention
  4. hardware failure - power failure or memory parity error
25
general intrerrupt flow
1. completes current instruction 2. saves current state (PC & registers) to status registers 3. identify interrupt source 4. jump to & activate interrupt handler routine or interrupt service routine (ISR) 5. return to original program & restore data
26
define polling
- alternative to interrupts - continually checking to see if device is ready - inefficient