Logic Gates & Boolean Flashcards

Week 3, 6 (46 cards)

1
Q

NAND gate

A
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2
Q

NOR gate

A
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3
Q

XOR gate

A
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4
Q

XNOR gate

A
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5
Q

what other representative is disjunctive normal form similar to

A

sum of products

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6
Q

what other representative is conjunctive normal form similar to

A

product of sums

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7
Q

how are expressions represented in DNF or SOP

A

C1 v C2 v C3 …

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8
Q

how are clauses represented in DNF or SOP

A

L1 ^ L2 ^ L3 …

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9
Q

what form is (A ^ ¬B ^ ¬ C) v (¬D ^ E ^ F) in

A

DNF

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10
Q

what form is AB + C in

A

SOP

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11
Q

how to convert to DNF or SOP

A
  • use a truth table
  • pick out rows where output is 1
  • if input is row is 0, negate the corresponding variable
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12
Q

how are expressions represented in CNF or POS

A

C1 ^ C2 ^ C3 …

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13
Q

how are clauses represented in CNF or POS

A

L1 v L2 v L3

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14
Q

what form is (A v ¬B v ¬C) ^ (¬D v E v F) in

A

CNF

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15
Q

what form is (A + B).C in

A

POS

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16
Q

how to convert to CNF or POS

A
  • use truth table
  • pick out rows where the output is 0
  • if input in row is 1, negate the corresponding variable
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17
Q

name the 7 combinational logic circuits

A
  1. multiplexor
  2. demultiplexor
  3. decoder
  4. ROM
  5. Adder
  6. Half-adder
  7. Mulit-bit adders
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18
Q

what is a multiplexor

A
  • selector
  • one of the inputs will be the output by using signal input bits
  • USES: program counter - control routing of data or signals
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19
Q

what is a demultiuplexor

A
  • selects output path by using signal input bits
  • opposite to multiplexor
20
Q

what is a decoder

A
  • circuit with n inputs & 2^n outputs
  • determines output line based on inputs
  • USES: address decoding & address space
21
Q

how is ROM a combinational logic circuit

A
  • can be implemented as a decoder and OR gates
  • decoder selects address
  • four outputs give 4-bit value stored there
22
Q

draw a half adder

23
Q

draw a full adder

24
Q

how to make a 4-bit adder

A

4 x 1-bit adders

25
how to make a 32-bit adder
4 x 8-bit full adders
26
name the 9 sequential logic circuits
1. flip flops 2. S-R latch 3. clocked S-R latch 4. D flip flop 5. J-K flip flop 6. register 7. counter 8. ripple counter 9. synchronous counter
27
what is a flip flop
1. it exists in one of two states and, in the absence of an input remains in that state 2. functions as a 1-bit memory 3. 2 outputs, which are always the complements of each other
28
what is an S-R latch
simple flip flop - s = set bit, r = reset bit
29
draw an S-R latch
30
draw and S-R characteristic table
31
what is the difference with a clocked S-R latch
- synchronises to clock pulse - useful to have in a system where we can predict the state change
32
draw a clocked S-R latch
33
what is a D flip flop
- implemented as a single input - avoids SR 11 invalid input
34
draw a D flip flop
35
draw a D flip flop characteristic table
36
what is a J-K flip flop
- all possible inputs are valid
37
draw a J-K flip flop
38
draw a J-K flip flop characteristic table
39
what is a register in terms of sequential logic circuits
- example of a use of flip flops
40
types of register implementation
1. parallel 2. shift
41
what is the parallel implementation of a register
- set of 1-bit memory items - can be read & written to concurrently
42
what is the shift implementation of a register
- data inputs from the left - with each clock pulse, data shifts right & rightmost bit is output
43
what is a counter in terms of sequential logic circuits
- register whose value is incremented by 1 - after max value achieved, register is reset to 0
44
what is a ripple counter
- asynchronous - signal to increment starts at one end and 'ripples' through - J & K are inputs - when clock pulses, counter is incremented by 1
45
what is a synchronous counter
- flip flops change at the same time
46